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Cypress Semiconductor CY7C130 - page 1
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 1K x 8 Dual-Port S t atic RAM Cypress Semiconducto r Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 38-06002 Rev . *E Revised December 0 9, 2008 Features ■ T rue dual-ported memory cells, which allow simultaneous reads of the same memory location ? ...
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Cypress Semiconductor CY7C130 - page 2
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 2 of 19 Pin Configurations Figure 1. Pin Diagram - DIP (T op View) Figure 2. Pin Diagram - PLCC (T op View) Figure 3. Pin Diagram - PQFP (T op View) 13 14 15 16 17 18 19 20 21 22 23 26 27 28 32 31 30 29 33 36 35 34 24 25 GND 1 2 3 4 5 6 7 8 9 10 11 38 39 40 44 4 ...
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Cypress Semiconductor CY7C130 - page 3
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 3 of 19 Pin Definitions Left Port Right Port Description CE L CE R Chip Enable R/W L R/W R Read/Write Enable OE L OE R Output Enable A 0L –A 11 / 1 2 L A 0R –A 11 / 1 2 R Address I/O 0L –I/O 15/17L I/O 0R –I/O 15/17R Data Bus Input/Output INT L INT R Int ...
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Cypress Semiconductor CY7C130 - page 4
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 4 of 19 Maximum Ratin gs [5] Exceeding maximum ratings may shorten the useful life of the device. User gui d elines are not tested. S torage T e mperature ............. ... .. ............... –65 ° C to + 150 ° C Ambient T e mperature with Power Applied .... ...
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Cypress Semiconductor CY7C130 - page 5
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 5 of 19 Cap acit ance [10] Parameter Description T est Conditi o ns Max Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V CC = 5.0V 15 pF C OUT Output Capacitance 10 pF Figure 4. AC T es t Loads and Waveforms 3.0V 5V OUTPUT R1 893 Ω R2 347 Ω 30 pF INCLUD ...
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Cypress Semiconductor CY7C130 - page 6
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 6 of 19 Switching Characteristics Over the Operating Range [7, 12] Parameter Description 7C131-15 [4] 7C131A-15 7C141-15 7C130-25 [4] 7C131-25 7C140-25 7C141-25 7C130-30 7C130A-30 7C131-30 7C140-30 7C141-30 Unit Min Max Min Max Min Max Read Cycle t RC Read Cycle ...
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Cypress Semiconductor CY7C130 - page 7
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 7 of 19 Busy/Interru pt Timing t BLA BUSY LOW from Address Match 15 20 20 ns t BHA BUSY HIGH from Address Mismatch [17] 15 20 20 ns t BLC BUSY LOW from CE LOW 15 20 20 ns t BHC BUSY HIGH from CE HIGH [17] 15 20 20 ns t PS Port Set Up for Priority 5 55 n s t WB [ ...
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Cypress Semiconductor CY7C130 - page 8
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 8 of 19 Switching Characteristics Over the Operating Range [7,12] Parameter Description 7C130-35 7C131-35 7C140-35 7C141-35 7C130-45 7C131-45 7C140-45 7C141-45 7C130-55 7C131-55 7C140-55 7C141-55 Unit Min Max Min Max Min Max Read Cycle t RC Read Cycle Time 35 45 ...
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Cypress Semiconductor CY7C130 - page 9
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 9 of 19 Switching W aveforms Figure 5. Read Cycle No. 1 [20, 21] Figure 6. Read Cycle No. 2 [20, 22] Figure 7. Read Cycle No. 3 [21] Notes 20. R/W is HIGH fo r read cycle. 21. Device is continuously selected, C E = V IL and OE = V IL . 22. Address valid prior to ...
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Cypress Semiconductor CY7C130 - page 10
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 10 of 19 Figure 8. Write Cycle No. 1 (OE Three-St ates Data I/Os—Either Port [16, 23] Figure 9. Write Cycle No. 2 (R/W Three-St ates Data I/Os—Either Port) [17, 24] Switching W aveforms (continued) t AW t WC DA T A V ALID HIGH IMPEDANCE t SCE t SA t PWE t HD ...
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Cypress Semiconductor CY7C130 - page 11
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 1 1 of 19 Figure 10. Busy Timing Diagram No. 1 (CE Arbitration) Figure 1 1. Busy Timing Diagram No. 2 (Address Arbitratio n) Switching W aveforms (continued) ADDRESS MA TCH t PS CE L V alid First: t BLC t BHC ADDRESS MA TCH t PS t BLC t BHC ADDRESS L, R BUSY R C ...
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Cypress Semiconductor CY7C130 - page 12
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 12 of 19 Figure 12. B usy Timing Diagram No. 3 Switching W aveforms (continued) t PWE t WB t WH Write with BUSY (Slave:CY7C140/CY7C141) BUSY R/W CE [+] Feedback ...
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Cypress Semiconductor CY7C130 - page 13
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 13 of 19 Figure 13. Interrup t Timing Diagrams Switching W aveforms (continued) WRITE 3FF t INS t WC t EINS Right Side Clears INT R t HA t SA t WINS READ 3F F t RC t EINR t HA t INT t OINR WRITE 3FE t INS t WC t EINS t HA t SA t WINS Right Side Sets INT L Left S ...
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Cypress Semiconductor CY7C130 - page 14
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 14 of 19 T ypical DC and AC Characteristics 1.4 1.0 0.4 4.0 4.5 5.0 5.5 6.0 –55 25 125 1.2 1.0 120 100 80 60 40 20 0 1.0 2.0 3.0 4.0 OUTPUT SOURCE CURRENT (mA) SUPPL Y VOL T AGE (V) NORMALIZED SUPPL Y CURRENT vs. SUPPL Y VOL T AGE NORMALIZED SUPPL Y CURRENT vs ...
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Cypress Semiconductor CY7C130 - page 15
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 15 of 19 Ordering Information Spee d (ns) Ordering Co de Package Name Package T ype Operating Range 30 CY7C130-30PC P25 48-Pin (600 Mil) Molde d DIP Commercial CY7C130A-30PI P25 48-Pin Pb-Free (600 Mil) Molded DIP Industrial 35 CY7C130-35PC P25 48-Pin (600 Mil) ...
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Cypress Semiconductor CY7C130 - page 16
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 16 of 19 35 CY7C140-35PC P25 48-Pin (600 Mil) Molde d DIP Commercial CY7C140-35PI P25 48-Pin (600 Mil) Molde d DIP Industrial 45 CY7C140-45PC P25 48-Pin (600 Mil) Molde d DIP Commercial CY7C140-45PI P25 48-Pin (600 Mil) Molde d DIP Industrial 55 CY7C140-55PC P25 ...
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Cypress Semiconductor CY7C130 - page 17
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 17 of 19 Package Diagrams Figure 14. 48-Pin (600 Mil) Sidebraze DIP D26 Figure 15. 52-Pin Pb-Free Plastic Leaded Chip Ca rrier J69 MIL-STD-1835 D-14 Config. C 51-80044 ** DIMENSIONS IN INCHES MIN. MAX. 0.045 0.055 0.020 MIN. 0.090 0.165 0.023 0.033 0.013 0.785 0 ...
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Cypress Semiconductor CY7C130 - page 18
CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 Document #: 38-06002 Rev . *E Page 18 of 19 Figure 16. 48-Pin (600 Mil) Molded DIP P25 Figure 17. 52-Pin Pb-F ree Plastic Quad Fl atp ack N52 Package Diagrams (continued) 51-85020 -*B 51-85042-** [+] Feedback ...
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Cypress Semiconductor CY7C130 - page 19
Document #: 38-06002 Rev . *E Revised December 09, 2008 Page 19 of 19 All products and c ompany names men tioned in th is document m ay be the tr ademarks o f t h eir respect i v e holders. CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 © Cypress Semicondu ctor Corpor ation, 2001-200 8. The informati on cont ained herein is subject to change ...
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