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Cypress Semiconductor STK14C88-3 - page 1
STK14C88-3 256 Kbit (32K x 8) AutoS tore nvSRAM Cypress Semiconducto r Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-50592 Rev . ** Revised January 29, 2009 Features ■ 35 ns and 45 ns access times ■ Automatic no nvolatile STORE on power loss ■ Nonvolatile STORE under Hardware or Software ...
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Cypress Semiconductor STK14C88-3 - page 2
STK14C88-3 Document Number: 001-50592 Rev . ** Page 2 of 17 Pin Configurations Figure 1. Pin Diagram - 32-Pin SOIC/32- Pin PDIP T able 1. Pin Definitions - 3 2-Pin SOIC/32-Pin PD IP Pin Name Alt IO T ype Description A 0 –A 14 Input Address In pu ts. Used to select one of the 32,768 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bidirectional Dat ...
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Cypress Semiconductor STK14C88-3 - page 3
STK14C88-3 Document Number: 001-50592 Rev . ** Page 3 of 17 Device Operation The STK14C88-3 nvSRAM is made up of two functional compo - nents paired in the same physical cell. These ar e an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvola ...
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Cypress Semiconductor STK14C88-3 - page 4
STK14C88-3 Document Number: 001-50592 Rev . ** Page 4 of 17 Hardware STORE (HSB ) Operation The STK14C88-3 provide s the HSB pin for controll ing and acknowledging the STORE operations. The HSB pin is used to request a hardware ST ORE cycle. When the HSB pin is driven LOW , the STK14C88-3 conditionally initiates a STORE operation after t DELA Y . A ...
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Cypress Semiconductor STK14C88-3 - page 5
STK14C88-3 Document Number: 001-50592 Rev . ** Page 5 of 17 Sof tware RECALL Data is transferred from the nonvola tile memory to the SRAM b y a software address sequence. A software RECALL cycle is initiated with a sequence of READ operations in a manner similar to the software STORE initiation. T o in itiate the RECALL cycle, the following sequenc ...
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Cypress Semiconductor STK14C88-3 - page 6
STK14C88-3 Document Number: 001-50592 Rev . ** Page 6 of 17 Best Practices nvSRAM products have been used e ffectively for over 15 years. While ease-of-use is o ne of the product’s main system values, experience gained working with hundreds of applica- tions has resulted in the following suggestions as best practices: ■ The nonvolatile cells in ...
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Cypress Semiconductor STK14C88-3 - page 7
STK14C88-3 Document Number: 001-50592 Rev . ** Page 7 of 17 Maximum Ratin gs Exceeding maximum ratings may shorten the useful life of the device. These user g uidelines are not tested. S torage T emperature ............. ... .. ... ............ –65 ° C to +150 ° C T emperature under bias .................. ............ –55 ° C to +125 ° C S ...
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Cypress Semiconductor STK14C88-3 - page 8
STK14C88-3 Document Number: 001-50592 Rev . ** Page 8 of 17 Dat a Retention and Endurance Parameter Description Min Unit DA T A R Data Retention 100 Y ears NV C Nonvolatile STORE Operations 1,000 K Cap acit ance In the following table, the capacitance parameters are listed. [8] Parameter Description T est Condi tions Max Unit C IN Input Capacit anc ...
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Cypress Semiconductor STK14C88-3 - page 9
STK14C88-3 Document Number: 001-50592 Rev . ** Page 9 of 17 AC Switching Characteristics SRAM Read Cycle Parameter Description 35 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access Time 35 45 ns t RC [9] t AVAV, t ELEH Read Cycle T ime 35 45 ns t AA [10] t AV Q V Address Access T ime 35 45 ns t DOE t GLQV Output Ena ...
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Cypress Semiconductor STK14C88-3 - page 10
STK14C88-3 Document Number: 001-50592 Rev . ** Page 10 of 17 T able 3. SRAM Write Cycle Parameter Description 35 n s 45 ns Unit Min Max Min Max Cypress Parameter Alt t WC t AVAV Write Cycle T ime 35 45 ns t PWE t WL WH, t WLEH Write Pulse Width 25 30 ns t SCE t EL WH, t ELEH Chip Enable T o End of Write 25 30 ns t SD t DVWH, t DVEH Data Setup to En ...
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Cypress Semiconductor STK14C88-3 - page 11
STK14C88-3 Document Number: 001-50592 Rev . ** Page 1 1 of 17 AutoS tore or Power Up RECALL Parameter Alt Description STK14C88-3 Unit Min Max t HRECALL [15] t RESTORE Power up RECALL Duration 550 μ s t STORE [16, 17 ] t HLHZ STORE Cycle Duration 10 ms t VSBL [16] Low V oltage T rigger (V SWITCH ) to HSB low 300 ns V RESET Low V oltage Reset Leve l ...
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Cypress Semiconductor STK14C88-3 - page 12
STK14C88-3 Document Number: 001-50592 Rev . ** Page 12 of 17 Sof tware Controlled STORE/RECALL Cycle The software controlled ST ORE/RECALL cycle follows. [18, 19] Parameter Alt Description 35 ns 45 ns Unit Min Max Min Max t RC [16] t AVAV STORE/RECALL Initiation Cycle T ime 35 45 ns t SA [18, 19] t A VEL Address Setup T ime 0 0 ns t CW [18, 19] t E ...
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Cypress Semiconductor STK14C88-3 - page 13
STK14C88-3 Document Number: 001-50592 Rev . ** Page 13 of 17 Hardware STORE Cycle Parameter Alt Description STK14C88-3 Unit Min Max t PHSB t HLHX Hardware STORE Pulse Width 15 ns t DHSB [16, 20] t RECOVER, t HHQX Hardware STORE High to Inhibit Off 700 ns t HLBL Hardware STORE Low to ST ORE Bus y 300 ns Switching W aveforms Figure 13. Hardware STORE ...
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Cypress Semiconductor STK14C88-3 - page 14
STK14C88-3 Document Number: 001-50592 Rev . ** Page 14 of 17 Ordering Information Spe e d (ns) Ordering Code Package Diagra m Package T ype Operating Range 35 STK14C88-3NF35TR 51-85127 32-pin SOIC Co mmercial STK14C88-3NF35 51-85127 32-pin SOIC STK14C88-3WF35 51-85018 32-pin PDIP STK14C88-3NF35ITR 51-8 5127 32-pin SOIC Industria l STK14C88-3NF35I 5 ...
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Cypress Semiconductor STK14C88-3 - page 15
STK14C88-3 Document Number: 001-50592 Rev . ** Page 15 of 17 Package Diagrams Figure 14. 32-Pin (300 Mil) SOIC (51-85127) 51-85058 *A PIN 1 ID SEATING PLANE 1 16 17 32 DIMENSIONS IN INCHES[MM] MIN. MAX. 0.292[7.416] 0.299[7.594] 0.405[10.287] 0.419[10.642] 0.050[1.270] TYP. 0.090[2.286] 0.100[2.540] 0.004[0.101] 0.0100[0.254] 0.006[0.152] 0.012[0.3 ...
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Cypress Semiconductor STK14C88-3 - page 16
STK14C88-3 Document Number: 001-50592 Rev . ** Page 16 of 17 Figure 15. 32-Pin (60 0 Mil) PDIP (51-85018) Package Diagrams (continued) ? ...
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Cypress Semiconductor STK14C88-3 - page 17
Document Number: 001-50592 Rev . ** Revised January 29, 20 09 Page 17 of 17 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this docum ent may be the trade marks of t heir respe ctive holders. STK14C88-3 © Cypress Semicondu ctor Corpor ation, 2008-200 9. ...
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