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Manuel d’utilisation Cypress CY7C68033

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Summary
  • Cypress CY7C68033 - page 1

    EZ-USB NX2LP-Flex™ Flexible USB NAND Flash Controller CY7C68033/CY7C68034 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 001-04247 Rev . *D Revised September 21, 2006 CY7C68033/CY7C68034 Silicon Features • Certified compliant for Bus- or Self-powered USB 2.0 operation (TID# 4 ...

  • Cypress CY7C68033 - page 2

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 2 of 33 Default NAND Firmware Features Because the NX2LP-Flex™ is intended for NAND Flash-based USB mass storage appli cations, a default firmware image is include d in the development kit with the following features: • High (480-Mbps) or full (12-Mbps) speed USB support • Both common NA ...

  • Cypress CY7C68033 - page 3

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 3 of 33 Figure 1. Example DVB Block Diagram Figure 2. Example G PS Block Di agram The “Reference De signs” sectio n of the Cypress we b site provides additional tools fo r typical USB 2.0 applications. Each reference design comes complete with firmware source and object code, schematics, a ...

  • Cypress CY7C68033 - page 4

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 4 of 33 Buses The NX2LP-Flex features an 8- or 16-bit ‘F IFO’ bidirectional data bus, multiplexed on I/O por t s B and D. The default firmware image implements an 8-bit data bus in GPIF Master mode. It is recommended that addi tional inter- faces added to the default firmware imag e use th ...

  • Cypress CY7C68033 - page 5

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 5 of 33 Figure 4. NX2LP-Flex Enumeration Sequenc e Normal Operation Mode In Normal Operation Mode, th e NX2LP-Flex b ehaves as a USB 2.0 Mass S torage Class NAND Flash controller . This includes all typical USB device states (powered, configured, etc.). The USB descri p to rs are re tu rn ed a ...

  • Cypress CY7C68033 - page 6

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 6 of 33 If Autovectoring is enabl ed (A V2EN = 1 in the INTSET -U P register), the NX2LP-Flex su bstitutes its INT2VEC byte. Therefore, if the high byte (‘page’) of a jump-table address is preloaded at location 0x544, the automatically-inserted INT2VEC byte at 0x545 will direct the jump to ...

  • Cypress CY7C68033 - page 7

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 7 of 33 If Autovectoring is enabl ed (A V4EN = 1 in the INTSET -U P register), the NX2LP-Flex su bstitutes its INT4VEC byte. Therefore, if the high byte (‘page’) of a jump-table address is preloaded at location 0x554, the automatically-inserted INT4VEC byte at 0x555 will direct the jump to ...

  • Cypress CY7C68033 - page 8

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 8 of 33 Wak eu p P i n s The 8051 puts itself and the rest of the chip into a power-down mode by setting PCON.0 = 1. This stops the oscillator and PLL. When W AKEUP is asserted by external logic, the oscil- lator restarts, af ter the PLL stabilizes, and then the 8051 receives a wakeup interrup ...

  • Cypress CY7C68033 - page 9

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 9 of 33 Endpoint RAM Size • 3 × 64 bytes (Endpoints 0 and 1) • 8 × 512 bytes (Endpoints 2, 4, 6, 8) Organization • EP0 — Bidirectional endpoint zero, 64-byte buffer • EP1IN, EP1OUT — 64-byte buffers, bulk or interrupt • EP2,4,6,8 — Eight 512-byte buffers, bulk, interrupt, or ...

  • Cypress CY7C68033 - page 10

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 10 of 33 Default High-Speed Alterna te Settings External FIFO Interface Architecture The NX2LP-Flex slave FIFO ar chitecture has ei ght 512-byte blocks in the endpoint RAM th at direc tly serve as FIFO memories, and are controlled by FIFO control sig nals (such as SLCS#, SLRD, SL WR, SLOE , PK ...

  • Cypress CY7C68033 - page 11

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 1 1 of 33 the default NAND firmwa re image implements an 8-bit data bus and up to 8 chi p enable pins on the GPIF ports, it is recom- mended that designs ba sed upon the d efault firmware image use an 8-bit data bus as well. Each GPIF vector defines the state of th e control outputs, and deter ...

  • Cypress CY7C68033 - page 12

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 12 of 33 Pin Assignment s Figure 9 and Figure 10 identify al l signals for the 56-pin NX2LP-Flex package. Three modes of operation are available for the NX2LP-Flex: Port mode, GPIF Master mode, and Slave FIFO mode. T hese modes define th e signals on th e right edge of ea ch column in Figure 9 ...

  • Cypress CY7C68033 - page 13

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 13 of 33 Figure 10. CY7C68033/CY7C6 8034 56-pin QFN Pin Assignment CY7C68033/CY7C68034 56-pin QFN 28 27 26 25 24 23 22 21 20 19 18 17 16 15 43 44 45 46 47 48 49 50 51 52 53 54 55 56 1 2 3 4 5 6 7 8 9 10 11 12 13 14 42 41 40 39 38 37 36 35 34 33 32 31 30 29 RESET# GND PA7/*FLAGD/SLCS# PA6/*PKTE ...

  • Cypress CY7C68033 - page 14

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 14 of 33 T able 8. NX2LP-F lex Pin Descriptions [6] 56 QFN Pin Number Default Pin Name NAND Firmware Usage Pin Ty p e Default Stat e Descriptio n 9 DMINUS N/A I/O/Z Z USB D– Signal . Connect to the USB D– signal. 8 DPLUS N/A I/O/Z Z USB D+ Signal . Connect to the USB D+ signal. 42 RESET# N ...

  • Cypress CY7C68033 - page 15

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 15 of 33 13 GPIO8 GPIO8 I/O/Z I GPIO8: is a bidirectional IO port pin. 14 R eserved# N/A Input N/A Reserv ed . Connect to ground. 15 SCL N/A OD Z Clock for the I 2 C interface. Connect to VCC wi th a 2.2K resistor , even if no I 2 C peripheral is attached. 16 SDA T A N/A OD Z Data for the I 2 ...

  • Cypress CY7C68033 - page 16

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 16 of 33 39 P A6 or PKTEND GPIO0 (Input) I/O/Z I (P A6) Multiplexed p in whose function is sel ected by the IFCONF IG[1:0] bits. PA 6 is a bidirectional I/O port pin. PKTEND is an input used to commit the FIFO packet data to the endpoint and whose polarity is programmable via FIFOPIN- POLAR[5] ...

  • Cypress CY7C68033 - page 17

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 17 of 33 46 PD1 or FD[9] CE1# I/O /Z I (PD1) Multiplexed pin whose functio n is selected by th e IFCONFIG[1:0] and EPxFIFOCFG .0 (wordwide) bits. FD[9] is the bidirectional FIFO/GPIF data bus. CE1# is a NAND chip enable output signal. 47 PD2 or FD[10] CE2# or GPIO2 I/O/Z I (PD2) Multiplexed pi ...

  • Cypress CY7C68033 - page 18

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 18 of 33 Register Summary NX2LP-Flex register bit definitions are de scribed in the EZ-USB TRM in greater detail. Some registers that are listed h ere and in the TRM do not apply to the NX2LP-Flex. The y are kept here for consistency reasons only . Registers that do not apply to the NX2LP-Flex ...

  • Cypress CY7C68033 - page 19

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 19 of 33 E629 1 ECCRESET ECC Reset x x x x x x x x 00000000 W E62A 1 ECC1B0 ECC1 Byte 0 Addr ess LINE15 LINE14 LINE13 LINE12 LINE1 1 LINE10 LINE9 LINE8 0000 0000 R E62B 1 ECC1B1 ECC1 Byte 1 Addr ess LINE7 LI NE6 LINE5 LINE4 LINE3 LINE2 LINE1 LINE0 00000000 R E62C 1 ECC1B2 ECC1 Byte 2 Addr ess ...

  • Cypress CY7C68033 - page 20

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 20 of 33 E65B 1 NAKIRQ [8] End point Ping -NAK/IBN Interrupt Request EP8 EP6 EP4 EP2 EP1 EP0 0 IBN xxxxxx0x bbbbbbrb E65C 1 USBIE USB Int Ena bles 0 EP0ACK HSGRANT URES SUSP SUTOK SOF SUDA V 00000000 RW E65D 1 USBIRQ [8] USB I nterrupt Request s 0 EP0ACK HSGRANT URES SUSP SUTOK SOF SUDA V 0xxx ...

  • Cypress CY7C68033 - page 21

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 21 of 33 E69E 2 reserv ed E6A0 1 EP0CS End point 0 Contr ol and Sta t us HSNAK 0 0 0 0 0 BUSY STALL 1000000 0 bbbbbbrb E6A1 1 EP1OUTCS End point 1 O UT Contro l and S tatus 0 0 0 0 0 0 BUSY STALL 0000 0000 bbbbbbrb E6A2 1 EP1INCS End point 1 IN Co ntrol and Sta t us 0 0 0 0 0 0 BUSY ST ALL 000 ...

  • Cypress CY7C68033 - page 22

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 22 of 33 E6CD 1 FLOWSTBPERIO D Master-S trobe Half-Per iod D7 D6 D5 D4 D3 D2 D1 D0 00000010 RW E6CE 1 GPIFTCB3 [7] GPIF T r an sact io n Count Byte 3 TC31 TC30 TC29 TC28 TC27 TC26 TC25 TC24 00000000 RW E6CF 1 GPIFTCB2 [7] GPIF T r an sact io n Count Byte 2 TC23 TC22 TC21 TC20 TC19 TC18 TC17 TC ...

  • Cypress CY7C68033 - page 23

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 23 of 33 83 1 DPH0 Data Pointer 0 H A15 A14 A13 A12 A1 1 A10 A9 A8 00 000000 RW 84 1 DPL1 [9] Data Pointer 1 L A7 A6 A5 A4 A3 A2 A1 A0 00000000 RW 85 1 DPH1 [9] Data Pointer 1 H A15 A14 A13 A12 A11 A1 0 A9 A8 00000000 RW 86 1 DPS [9] Data Pointer 0/1 sel ect 0 0 0 0 0 0 0 SE L 00000000 RW 87 1 ...

  • Cypress CY7C68033 - page 24

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 24 of 33 Absolute Maximum Ratings S torage T emperature .............. .............. ...... –65°C to +150°C Ambient T emperature with Powe r Supplied ...... 0°C to +70°C Supply V oltage to Ground Potential ............... –0 .5V to +4.0V DC Input V oltage to Any Input Pin ............ ...

  • Cypress CY7C68033 - page 25

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 25 of 33 DC Characteristics USB T ran sceiver USB 2.0-compliant in full- and high-speed modes. AC Electrical Characteristics USB T ran sceiver USB 2.0-compliant in full- and high-speed modes. T able 10.DC Characteristics Parameter Description Cond itions Min. T yp. Max. Unit V CC Supply V olta ...

  • Cypress CY7C68033 - page 26

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 26 of 33 Slave FIFO Asynchr onous Read Figure 1 1. Slave FIFO Asynch ronous Read T iming Diagram [13] Slave FIFO Asynch ronous W rite Figure 12. Slave FIFO Asynch ron ous Write Timing Diagram [13] T able 1 1.Slave FIFO Asynchro nous Read Pa rameters [15] Parameter D escription Min. Max. Unit t ...

  • Cypress CY7C68033 - page 27

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 27 of 33 Slave FIFO Asynchr onous Packet End Strobe Figure 13. Slave FI FO Asynchronous Packet End Strobe Timing Diagram [9] Slave FIFO Output Enable Figure 14. Slave FIFO Outpu t Enable Timing Diagram [13] Slave FIFO Address to Flags/Data Figure 15. Slave FIFO Address to Flag s/Data Timing Di ...

  • Cypress CY7C68033 - page 28

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 28 of 33 Slave FIFO Asynch ro no us Addre ss Figure 16. Slave FI FO Asynchrono us Address Timing Diagram [13] Sequence Diagram Sequence Diagram of a Single and Burst Asynchronous Read Figure 17. Slave FIFO Asynch ro nous Read Sequence and Timing Diagram [13] Figure 18. Slave FIFO Asynch ro nou ...

  • Cypress CY7C68033 - page 29

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 29 of 33 Figure 17 diagrams the timing relationship of the SLA VE FIFO signals during an asynchronous F IFO read. It shows a single read followed by a burst read. • At t = 0 the FIFO address is stable and the SLCS signal i s asserted. • At t = 1, SLOE is ass erted. This resul ts in the da ...

  • Cypress CY7C68033 - page 30

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 30 of 33 Ordering Information T able 17.Ordering Inform ation Ordering Code Description Silicon for b attery-powered a pplications CY7C68034-56LFXC 8x8 mm, 56 QFN – Lead-free Silicon for non-battery-powered ap plication s CY7C68033-56LFXC 8x8 mm, 56 QFN – Lead-free Development Kit CY3686 E ...

  • Cypress CY7C68033 - page 31

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 31 of 33 PCB Layout Recommendations [16] The following recommendati ons should be followed to ensure reliable high-performance operation: • At least a four-layer impedance controlled boards is recom- mended to maintain signal quality . • S peci fy impedance targets (ask your board vendor w ...

  • Cypress CY7C68033 - page 32

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 32 of 33 © Cypress Semi con duct or Cor po rati on , 20 06 . The information con t a in ed he re i n is su bject to change wi t hou t n oti ce. C ypr ess S em ic onduct or Corporation assumes no resp onsibility f or the u se of any circuitry o ther than circui try embodied i n a Cypress prod ...

  • Cypress CY7C68033 - page 33

    CY7C68033/CY7C68034 Document #: 001-04247 Rev . *D Page 33 of 33 Document History Page Document Title: CY7C68033/CY7C 68034 EZ-USB NX2LP-Fle x™ Flex ible USB NAND Flash Controller Document #: 001-04247 Rev . *D REV . ECN NO. Issue Date Orig. of Change Description of Change ** 388499 See ECN GIR Preliminary dr aft *A 3 94699 See ECN XUT Minor Chan ...

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Les documents que nous recevons du fabricant de l'appareilCypress CY7C68033 peuvent être divisés en plusieurs groupes. Ceux-ci sont, entre autres:
- dessins techniques Cypress
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Tous sont importants, mais les informations les plus importantes du point de vue de l'utilisation de l'appareil se trouvent dans le manuel d’utilisation Cypress CY7C68033.

Un groupe de documents appelé manuels d’utilisation est également divisé en types plus spécifiques, tels que: Manuels d’installation Cypress CY7C68033, manuels d’entretien, brefs manuels ou manuels de l’utilisateur Cypress CY7C68033. Selon vos besoins, vous devriez chercher le document dont vous avez besoin. Sur notre site, vous pouvez voir le manuel le plus populaire d’utilisation du produit Cypress CY7C68033.

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Manuel d’utilisation complet de l’appareil Cypress CY7C68033, quelle devrait-elle être?
Le manuel d’utilisation, également appelé le mode d’emploi, ou tout simplement le manuel, est un document technique destiné à aider à utiliser Cypress CY7C68033 par les utilisateurs. Des manuels sont généralement écrits par un rédacteur technique, mais dans un langage accessible à tous les utilisateurs Cypress CY7C68033.

Le manuel d’utilisation complet Cypress, devrait inclure plusieurs éléments de base. Certains d'entre eux sont moins importants, tels que: la couverture / page de titre ou pages d'auteur. Cependant, la partie restante, devrait nous fournir des informations importantes du point de vue de l'utilisateur.

1. Introduction et des conseils sur la façon d'utiliser le manuel Cypress CY7C68033 - Au début de chaque manuel, nous devrions trouver des indices sur la façon d'utiliser le document. Il doit contenir des informations sur l'emplacement de la table des matières Cypress CY7C68033, FAQ ou des problèmes les plus fréquents - les points qui sont les plus souvent recherchés par les utilisateurs de chaque manuel
2. Table des matières - index de tous les conseils pour lCypress CY7C68033 qui peuvent être trouvés dans le document courant
3. Conseils sur la façon d'utiliser les fonctions de base de l’appareil Cypress CY7C68033 - qui devraient nous aider dans les premières étapes lors de l'utilisation Cypress CY7C68033
4. Troubleshooting - séquence systématique des activités qui nous aideront à diagnostiquer et ensuite résoudre les principaux problèmes de Cypress CY7C68033
5. FAQ - questions fréquemment posées
6. Détails du contact Informations sur l'endroit où chercher le contact avec le fabricant / service Cypress CY7C68033 dans un pays donné, si le problème ne peut être résolu par nous-mêmes.

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