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Manual Cypress CY7C1386F

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  • Cypress CY7C1386F - page 1

    18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Cypress Semiconductor Corpora tion • 198 Champion Cou rt • San Jose , CA 95134-1 709 • 408-943-2 600 Document Number: 38-0 5545 Rev . *E Revised Feburary 09, 2007 Features • Supports bus operation up to 250 MHz • Available speed grades are 25 ...

  • Cypress CY7C1386F - page 2

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 2 of 30 Logic Block Diagram – CY7C1386D/CY7C138 6F [3] (512K x 36) Logic Block Diagram – CY7C1387D/CY7C138 7F [3] (1M x 18) ADDRESS REGISTER ADV CLK BURST COUNTER AND LOGIC CLR Q1 Q0 ADSP ADSC MODE BW D BW C BW B BW A BWE GW CE 1 CE 2 CE 3 OE DQ D, DQP D BYTE WRIT ...

  • Cypress CY7C1386F - page 3

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 3 of 30 Pin Configurations A A A A A 1 A 0 NC/72M NC/36M V SS V DD A A A A A A A A DQP B DQ B DQ B V DDQ V SSQ DQ B DQ B DQ B DQ B V SSQ V DDQ DQ B DQ B V SS NC V DD ZZ DQ A DQ A V DDQ V SSQ DQ A DQ A DQ A DQ A V SSQ V DDQ DQ A DQ A DQP A DQP C DQ C DQ C V DDQ V SSQ D ...

  • Cypress CY7C1386F - page 4

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 4 of 30 Pin Configurations (continued) 234 5 67 1 A B C D E F G H J K L M N P R T U V DDQ NC/288M NC/144M DQP C DQ C DQ D DQ C DQ D AA A A ADSP V DDQ A DQ C V DDQ DQ C V DDQ V DDQ V DDQ DQ D DQ D NC NC V DDQ V DD CLK V DD V SS V SS V SS V SS V SS V SS V SS V SS NC/576 ...

  • Cypress CY7C1386F - page 5

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 5 of 30 Pin Configurations (continued) 165-Ball FBGA Pinout (3 Chip Enable) CY7C138 6D (512K x 36) 234 567 1 A B C D E F G H J K L M N P R TDO NC/288M NC/144M DQP C DQ C DQP D NC DQ D CE 1 BW B CE 3 BW C BWE A CE 2 DQ C DQ D DQ D MODE NC DQ C DQ C DQ D DQ D DQ D NC/36 ...

  • Cypress CY7C1386F - page 6

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 6 of 30 Pin Definitions Name IO Description A 0 , A 1 , A Input- Synchronous Address inputs used to select one of the add ress locations . Sampled at the rising edge of the CLK if ADSP or ADSC is active LOW , and CE 1 , CE 2 , and CE 3 [2] are sampled active . A1: A0 ...

  • Cypress CY7C1386F - page 7

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 7 of 30 Functional Overview All synchronous inpu ts pass through input registers controlled by the rising edge of th e clock. All data outputs pass through output registers controlled by th e rising edge of the clock. The CY7C1386D/CY 7C1387D/CY7C1386F/CY7C1387F suppo ...

  • Cypress CY7C1386F - page 8

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 8 of 30 The write signals (GW , BWE , and BW X ) and ADV inputs are ignored during this first cycl e. ADSP triggered write accesses require two cl ock cycles to complete. If GW is asserted LOW on the seco nd clock rise, the data presented to the DQ x inputs is written ...

  • Cypress CY7C1386F - page 9

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 9 of 30 T ruth T able [4, 5, 6, 7, 8] Operation Add. Used CE 1 CE 2 CE 3 ZZ ADSP ADSC ADV WRITE OE CLK DQ Deselect Cycle, Pow er Down None H X X L X L X X X L-H T ri-S tate Deselect Cycle, Pow er Down None L L X L L X X X X L-H T ri-S tate Deselect Cycle, Pow er Down ...

  • Cypress CY7C1386F - page 10

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 10 of 30 T ruth T able for Read/Write [6, 9] Function (CY7C1386D/CY7C13 86F) GW BWE BW D BW C BW B BW A R e a d H HXXXX R e a d H L HHHH Write Byte A – (DQ A and DQP A ) H L HHH L Write Byte B – (DQ B and DQP B )H L H H L H Write Bytes B, A H L H H L L Write Byte ...

  • Cypress CY7C1386F - page 11

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 1 1 of 30 IEEE 1 149.1 Serial Boundary Scan (JT AG) The CY7C1386D/CY 7C1387D/CY7C1386F/CY7C1387F incorporates a serial bound ary scan test access port (T AP). This part is fully compliant with 1 149.1. The T AP operates using JEDEC-standard 3.3V or 2.5V IO logic level ...

  • Cypress CY7C1386F - page 12

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 12 of 30 When the T AP controller is in the Capture-IR state, the two least significant bits are loaded with a binary ‘01’ pattern to allow for fault isolation of the board-le vel serial test data p ath. Byp ass Register T o save time when serially shifting data t ...

  • Cypress CY7C1386F - page 13

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 13 of 30 the T AP controller , it wi ll direct ly control the state of the output (Q-bus) pins, when the EXTEST is entered as the current instruction. When HIGH, it will en able the output buffers to drive the output bus. When LOW , this bit will place the output bus ...

  • Cypress CY7C1386F - page 14

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 14 of 30 3.3V T AP AC T est Conditions Input pulse levels ................... .............. ........... .....V SS to 3.3V Input rise and fall times ........... ............ ........... ................ 1 ns Input timing reference levels .................. ........... ...

  • Cypress CY7C1386F - page 15

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 15 of 30 Identification Register Definitions Instruction Field CY7C13 86D/CY7C1386F (512K × 36) CY7C1387D/CY7C1387F (1M × 18) Description Revision Number (31:29) 000 000 Descri bes the version number Device Depth (28:24) [13] 01 01 1 0101 1 Reserved for internal use ...

  • Cypress CY7C1386F - page 16

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 16 of 30 1 19-Ball BGA Boundary Scan Order [14, 15] Bit # Ball ID Bit # Ball ID Bit # Ball ID Bit # Ball ID 1 H4 23 F6 45 G4 67 L1 2 T 4 2 4E 7 4 6A 4 6 8 M 2 3 T 5 2 5D 7 4 7G 3 6 9N 1 4T 6 2 6 H 7 4 8 C 3 7 0 P 1 5 R 5 2 7 G 6 4 9B 2 7 1K 1 6 L 5 2 8E 6 5 0B 3 7 2 L ...

  • Cypress CY7C1386F - page 17

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 17 of 30 165-Ball BGA Boundary Scan Order [14, 16] Bit # Ball ID Bit # Ball ID Bit # Ball ID 1N 6 3 1 D 1 0 6 1 G 1 2N 7 3 2 C 1 1 6 2 D 2 3N 1 0 3 3 A 1 1 6 3 E 2 4P 1 1 3 4 B 1 1 6 4F 2 5P 8 3 5 A 1 0 6 5 G 2 6R 8 3 6 B 1 0 6 6 H 1 7R 9 3 7 A 9 6 7 H 3 8P 9 3 8 B 9 ...

  • Cypress CY7C1386F - page 18

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 18 of 30 Maximum Ratings Exceeding the maximum ratings may impair the useful life of the device. For user guideline s, not tested. S torage T emperature .................... ............. –65°C to +150°C Ambient T emperature w ith Power Applied ................... ...

  • Cypress CY7C1386F - page 19

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 19 of 30 Cap acit ance [19] Parameter Description T est Co nditions 10 0 TQFP Max. 1 19 BGA Max 165 FBGA Max Unit C IN Input Capacit ance T A = 25 ° C, f = 1 MHz, V DD = 3.3V V DDQ = 2.5V 5 8 9 pF C CLK Clock Input Capacitance 5 8 9 pF C IO Input/Output Capacitance 5 ...

  • Cypress CY7C1386F - page 20

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 20 of 30 Switching Characteristics Over the Operating Range [20, 21] Parameter Description –250 –20 0 –167 Unit Min M ax Min Max Min Max t POWER V DD (T ypical) to the First Access [22] 11 1 m s Clock t CYC Clock Cycle Ti me 4.0 5.0 6.0 ns t CH Clock HIGH 1.7 2. ...

  • Cypress CY7C1386F - page 21

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 21 of 30 Switching W aveforms Read Cycle Timing [26] t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A1 t CEH t CES GW, BWE,BW Data Out (DQ) High-Z t DOH t CO ADV t OEHZ t CO Single READ BURST READ t OEV t OELZ t CHZ Burst wraps around to its initial ...

  • Cypress CY7C1386F - page 22

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 22 of 30 Write Cycle T iming [26, 27] Switching W aveforms (conti nued) t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A1 t CEH t CES BWE, BW X ADV BURST READ BURST WRITE D(A2) D(A2 + 1) D(A3) D(A3 + 1) D(A2 + 3) A2 A3 Extended BURST WRITE Single WR ...

  • Cypress CY7C1386F - page 23

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 23 of 30 Read/Write Cycle Timing [26, 28, 29] Switching W aveforms (conti nued) t CYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t AH t AS A2 t CEH t CES Data Out (Q) High-Z ADV Single WRITE D(A3) A4 A5 A6 D(A5) D(A6) Data In (D) BURST READ Back-to-Back READs H ...

  • Cypress CY7C1386F - page 24

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 24 of 30 ZZ Mode T iming [30, 31] Switching W aveforms (conti nued) t ZZ I SUPPLY CLK ZZ t ZZREC ALL INPUTS (except ZZ) DON’T CARE I DDZZ t ZZI t RZZI Outputs (Q) High-Z DESELECT or READ Only Notes 30. Device must be deselecte d when entering ZZ sleep mode. See cycl ...

  • Cypress CY7C1386F - page 25

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 25 of 30 Ordering Information Not all of the spe ed, package, and temperature range s are availa b le. Please contact your local sales representative or visit www .cypress.com for actual p roducts offered. Spee d (MHz) Ordering Code Package Diagram Part and Package T ...

  • Cypress CY7C1386F - page 26

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 26 of 30 250 CY7C1386D-250AXC 51-850 50 100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free Commercial CY7C1387D-250AXC CY7C1386F-250BGC 51-8 51 15 1 19-ball Ball Grid Array (14 x 22 x 2.4 mm) CY7C1387F-250BGC CY7C1386F-250BGXC 51-8 51 15 1 19-ball Ball Grid Array ...

  • Cypress CY7C1386F - page 27

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 27 of 30 Package Diagrams Figure 1. 100-Pin Thin Plastic Q uad Flat p a ck (14 x 20 x 1.4 mm) (51-85050) NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PE ...

  • Cypress CY7C1386F - page 28

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 28 of 30 Figure 2. 1 19-Ball BGA (1 4 x 22 x 2.4 mm) (51-85 1 15) Package Diagrams (continued) 51-851 15-*B [+] Feedback ...

  • Cypress CY7C1386F - page 29

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 29 of 30 © Cypress Semicond uctor Corporation , 2006-2007. The inf ormation cont ained herein i s subject to change witho ut notice. Cypress Semiconductor Corporat ion assumes no responsibility for the use of an y circuitry oth er than circui try embodied in a Cypre ...

  • Cypress CY7C1386F - page 30

    CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F Document Number: 38-05545 Rev . *E Page 30 of 30 Document History Page Document Title: CY7C1386D/CY7C1387D/CY7 C1386F/CY7C1387F, 18-Mbit (512 K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM Document Number: 38-05545 REV . ECN NO. Issue Date Orig. of Change Description of Change ** 254550 See ECN RKF New data sh ...

Manufacturer Cypress Category Computer Hardware

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All of them are important, but the most important information from the point of view of use of the device are in the user manual Cypress CY7C1386F.

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A complete Cypress manual, should contain several basic components. Some of them are less important, such as: cover / title page or copyright page. However, the remaining part should provide us with information that is important from the point of view of the user.

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