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Manual Intel IXF1104

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  • Intel IXF1104 - page 1

    Intel ® IXF1 104 4-Port Giga bit Ethe rnet Med ia A ccess Co ntro ller Da ta sh eet The In te l ® IXF1 104 4-P ort Gi ga bit Ethernet Me dia Ac cess C ontroller (her eafter r eferred t o as the IXF1 104 MAC) supp orts IEEE 802.3* 10/100 /1000 Mbps a ppli cations. T he IXF1 104 MAC support s a S ystem P acket Interface Pha se 3 (S PI3) syst e m in ...

  • Intel IXF1104 - page 2

    2 D atasheet Document Number: 2 78757 Re vision Num ber: 009 Revisio n Date: 27-Oct-2005 INFORMA T ION IN THIS DOCUMENT IS PROVIDE D IN CONNECTION WITH INTE L ® PRODUCTS . NO LICENSE, EXPRESS O R IMPLIED, BY ESTO PPEL OR O TH ERWIS E, TO A NY I NTE LLE CTUA L PR OP ERTY R IGH TS IS GRA NTE D BY THIS D OC UME NT . EXCE PT AS PR OVID ED IN INTEL&apo ...

  • Intel IXF1104 - page 3

    Contents Datasheet 3 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Content s 1. 0 I ntr odu cti on ... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... . .. . 20 1.1 What You W ill Fi nd i n T his D ocum en t . ...

  • Intel IXF1104 - page 4

    Contents 4 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 5.1.5 .1 Speed... ....... .... ........ .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... .... 78 5.1.5 .2 Dupl e x .... ....... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ...

  • Intel IXF1104 - page 5

    Contents Datasheet 5 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.6.2.3 Recei ver Op erational Overview . .......................................................... 1 05 5.6. 2.4 Sel ecti ve P ower-Down .... ..... ....... ..... ..... .... ..... ..... ..... ....... .... ........ .... ..... 105 5.6. 2.5 Rece ...

  • Intel IXF1104 - page 6

    Contents 6 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 6.0 Applications ..... ....... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... .. 130 6.1 Change Port Mode Initialization Sequenc e........................ .... ...

  • Intel IXF1104 - page 7

    Contents Datasheet 7 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 9. 0 M ech ani cal Sp ec if i cati on s .. ..... ..... .. ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... 2 24 9.1 Ove rvi ew ..... .... ..... ..... ..... .... ..... ..... ..... .... ...

  • Intel IXF1104 - page 8

    Contents 8 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 37 RGMII I nterfa ce T iming ..... .... ..... ..... .... ..... ..... ..... .... ..... ....... ..... ..... .... ..... ..... ..... ....... .... ..... .... .... . 14 1 38 1000 BASE- T Tran smit Inte rface Ti min g ... ..... ..... ....... ..... .... ... ...

  • Intel IXF1104 - page 9

    Contents Datasheet 9 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 25 RMON Add iti onal Statist ics...... ..... ....... ..... .... ..... ..... ..... .... ....... ..... ..... ..... .... ..... ..... .... ..... ..... ... .. .... 81 26 G MII Interface Signal Definitions . ...................... .................. ...

  • Intel IXF1104 - page 10

    Contents 10 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 75 FC TX T imer V a lue ( $ Port_I n dex + 0x07 ) .... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... .... 164 76 F D FC Addres s ($ Port_Index + 0x08 – + 0x09) ....................... ...................... ...

  • Intel IXF1104 - page 11

    Contents Datasheet 11 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 125 RX F IFO Err o red Frame Drop Co unte r Port s 0 - 3 ( $0x5A 2 - 0x5 A5) ..... ..... ....... .... ........ .... ..... 198 126 RX FIFO SPI3 Loopb ack Enable for Ports 0 - 3 ($0x5B2). ................. ..................... ................ ...

  • Intel IXF1104 - page 12

    Contents 12 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 Revision History Revision Number: 0 0 9 Re visio n Da t e : 27- Oc t- 2005 Pag e # Des crip tio n 71 Modi fied Figu re 8 “ Et hernet F ra me Form at” [cha nged Pream b le byte cou nt to 7 byte s]. 136 S ection 45, “ R GMII Po wer” [c ha ng ...

  • Intel IXF1104 - page 13

    Contents Datasheet 13 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 170 M odif ied T able 89 “TX Confi g Wo rd ($ Port_Ind ex + 0x17 )” [c ha nged defau lt va lu e for t he re gister from “0 x0001 A0” to “ 0x000 001A 0” and c ha nged d efau lt valu e for bi t 6 (Hal f Dupl ex) fr om 1 to 0] . 181 ...

  • Intel IXF1104 - page 14

    Contents 14 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 Re vi sio n Nu mb er: 00 7 Re vi sio n Da te : M arc h 24, 20 04 (Sh e et 1 of 5 ) Pag e # Des crip ti on All Glob ally repl aced GBI C w ith O pti cal M o dule Inter fac e. Al l Gl oba lly ed ite d sign al nam es. All Gl oba lly ch an ge d SerD es ...

  • Intel IXF1104 - page 15

    Contents Datasheet 15 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 39 Modi fie d S ection 4.3, “ S i gn al Des crip t ion T abl es” [ch ange d he adin g from “ Signa l Nami ng Co nven tio ns ; ad de d ne w head in gs S ect ion 4.1 .1 , “S ig nal N am e Co nv enti on s” an d S ecti on 4. 1.2, “R e ...

  • Intel IXF1104 - page 16

    Contents 16 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 98 Mod ifi ed Fig ure 19 “TX _CTL Beh avior” [ch anged sign al nam es]. 98 Mo difi ed Fi gu re 2 0 “ RX_ CT L B eha vi or” [cha ng ed sig na l n ame s] . 99 Modi fie d Se cti on 5 .5, “M DI O Co nt rol an d I nter f ace” [c ha nged 3 .3 ...

  • Intel IXF1104 - page 17

    Contents Datasheet 17 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 156 Br ok e up th e old Re gister Map in to T abl e 59 “MA C Cont rol R egist ers ( $ Por t In dex + Of f set ) ” , T abl e 60 “ MAC RX S t atis tics Regi ste r s ($ Po rt Ind ex + O f fse t)”, T a ble 61 “M AC TX S tat is t ics Reg ...

  • Intel IXF1104 - page 18

    Contents 18 D at a sheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 207 Mod if ied T able 136 “ L oop R X Da t a to TX FIF O (Lin e-Si de Loo pb ack) Po rts 0 - 3 ( $0x6 1F )” [r enam ed hea ding and bit nam e]. 208 Mod if ied T able 138 “TX FI FO Over flow Fra me Dro p Cou nter P or ts 0 - 3 ($ 0x 621 – 0 ...

  • Intel IXF1104 - page 19

    Contents Datasheet 19 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 140 M odif ied T able 53 “ IPG Re cei ve an d Tr ansmi t T i me R egi ster ( Addr: Por t _Ind ex + 0x0A – + 0x0C )” . 143 M od ifi ed T ab le 60 “ S hort Run ts Thr eshol d Regis ter (A d dr: Po rt_I nd ex + 0x1 4)”. 143 M od ifi ed ...

  • Intel IXF1104 - page 20

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 1.0 I ntr oduc tion This docu m ent co ntains info rmati on on the IXF1 104 MAC, a four -port Giga bit Media Acce s s Control ler tha t support s IEEE 8 02.3 10 /100/100 0 Mbps a p ...

  • Intel IXF1104 - page 21

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 21 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 2.0 General Desc r ipti on The IXF1 104 MAC provides up to a 4. 0 Gbps interfa ce to f our indi vidual 10/100 /1000 Mbps full- duple x or 10/100 Mbps half- duple x-capabl e Ethern e t Medi ...

  • Intel IXF1104 - page 22

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 22 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Figure 2 illustra tes the IXF1 104 MAC inte rnal archi tectu re. Figure 2. I nternal Arch itec ture SP I3 I nte rfa ce CPU I nterfa c e RMON St at isti cs Pack et TX Buf fer RX Pac ...

  • Intel IXF1104 - page 23

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 23 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 3.0 Ball Assignment s and Ball List T ables 3.1 Ball A ssig nmen t s See Figur e 3 , T able 1 “Ba ll List in Alphan um eric Or der by Sign a l Name” on page 24 , and Ta b l e 2 “Ba ...

  • Intel IXF1104 - page 24

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 24 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 3.2 Ball List T ab le s 3.2.1 Ba lls Listed in Alphabe t ic Order by Sign al Name Ta b l e 1 shows the ba ll loca ti ons and s ignal na mes arranged in alphanum eric ord e r by signa l n ...

  • Intel IXF1104 - page 25

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 25 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 GN D R 2 GN D R 6 GN D R 9 GN D R 11 GN D R 1 4 GN D R 1 6 GN D R 1 9 GN D R 2 3 GN D T1 0 GN D T1 5 GN D U 4 GN D U 8 GN D U 1 2 GN D U 1 3 GN D U 1 7 GN D U 2 1 GN D W2 GN D W6 GN ...

  • Intel IXF1104 - page 26

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 26 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 No Ba ll AC1 No Ba ll AC2 No Ball AC23 No Ball AC24 No Ba ll AD1 No Ba ll AD2 No Ba ll AD3 No Ball AD22 No Ball AD23 No Ball AD24 No Pad A1 PT PA 2 B1 1 RDA T_0 2 A15 RDA T_1 2 A14 RDA T ...

  • Intel IXF1104 - page 27

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 27 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 RXD5_1 1 AC1 1 RXD5_2 1 V20 RXD5_3 1 T1 7 RXD6_0 1 AB 5 RXD6_1 1 AA 1 1 RXD6_2 1 V19 RXD6_3 1 T1 8 RXD7_0 1 AC5 RXD7_1 1 Y1 0 RXD7_2 1 W20 RXD7_3 1 T1 9 ST P A 2 C1 1 SY S_RST_ L AD1 ...

  • Intel IXF1104 - page 28

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 28 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 TXD4_1 1 AA 7 TXD4_2 1 AD1 6 TXD4_3 1 AA 14 TXD5_0 1 AC3 TXD5_1 1 AB 8 TXD5_2 1 AB 19 TXD5_3 1 Y1 5 TXD6_0 1 AB4 TXD6_1 1 AD8 TXD6_2 1 AA 20 TXD6_3 1 AA 16 TXD7_0 1 Y4 TXD7_1 1 AC9 TXD7_ ...

  • Intel IXF1104 - page 29

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 29 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 VDD2 F8 VDD2 F12 VDD2 H2 VDD2 H6 VDD2 J12 VDD2 M2 VDD2 M6 VDD2 M9 VDD2 M12 VDD3 B13 VDD3 B17 VDD3 B21 VDD3 D23 VDD3 F13 VDD3 F17 VDD3 H19 VDD3 H23 VDD3 J13 VDD3 M13 VDD3 M16 VDD3 M19 ...

  • Intel IXF1104 - page 30

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 30 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 3.2.2 Ba lls Listed in Alph abetic Orde r by Ball Locatio n Ta b l e 2 shows the ba ll loca ti ons and s ignal na m es arran ge d in order by ba ll lo ca tio n. T ab le 2. Ball List in A ...

  • Intel IXF1104 - page 31

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 31 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 E6 TDA T1 7 2 E7 TDA T1 8 2 E8 TDA T1 9 2 E9 TDA T2 0 2 E10 TDAT21 2 E1 1 TERR_2 2 E12 NC E13 RS X 2 E14 RDA T_6 2 E15 RPR TY_0 2 E16 RDA T_1 1 2 E17 RDA T_13 2 E18 RDA T_14 2 E19 RV ...

  • Intel IXF1104 - page 32

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 32 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 J2 4 TDI K1 TERR_1 2 K2 GND K3 UPX_D ATA1 K4 VDD K5 UPX_D ATA7 K6 GND K7 NC K8 VDD K9 GND K10 UPX_ DATA17 K1 1 GND K12 UPX_ DATA21 K13 UPX_ DATA23 K14 GN D K15 UPX_ DATA25 K16 GN D K17 V ...

  • Intel IXF1104 - page 33

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 33 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 P18 NC P19 RX_ LOS_IN T 3 P20 T X PAUSE_ADD1 P21 T X PAUSE_ADD2 P22 RX_P _0 3 P23 T X_F AUL T _IN T 3 P24 I 2 C_DA T A_3 3 R1 UPX_ADD3 R2 GND R3 UPX_CS_L R4 VDD R5 NC R6 GND R7 GND R ...

  • Intel IXF1104 - page 34

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 34 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 W12 VDD5 W13 VDD4 W1 4 TX D7_ 3 1 W1 5 GN D W16 TX_P_2 3 W17 VDD4 W1 8 RX D3_ 3 1 W1 9 GN D W2 0 RX D7_ 2 1 W2 1 VD D W2 2 RX D4_ 2 1 W2 3 GN D W2 4 MDC 4 Y1 TXD0_0 1 Y2 TXD1_0 1 Y3 TXD2 ...

  • Intel IXF1104 - page 35

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 35 Document N umber: 27 8757 Revision Nu mber: 00 9 Revi si on D a te: 27 -Oct -2 0 05 AD6 TX_E R_1 1 AD7 TXC_1 1 AD8 TXD 6_1 1 AD9 TXD 3_1 1 AD10 RXD4_1 1 AD1 1 RXC_1 1 AD12 SY S_RS T_L AD 13 TX_P_ 1 3 AD 14 TX _N_ 1 3 AD15 CO L_2 1 AD16 TXD 4_2 1 AD 17 TX_ER _2 1 AD ...

  • Intel IXF1104 - page 36

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 36 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 ...

  • Intel IXF1104 - page 37

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 37 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4.0 Ball Assignm ent s and Signal Descri ptions 4.1 Namin g Con ve nt io ns 4.1.1 Signal Name Conventions Si gna l na mes beg in with a Signa l Mne moni c , and can also c ontain one or mo ...

  • Intel IXF1104 - page 38

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 38 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 4.2 Int erfa ce Si gnal Gr oup s This sect ion d e scrib es th e IXF1 104 M A C sign als in group s acco r ding to th e ass o ci ated inter f ace o r functi on. Figure 4 shows the ...

  • Intel IXF1104 - page 39

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 39 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4. 3 S i g nal D e script ion T ables The I/ O signals , power supplie s, or ground retur ns associa ted with eac h IXF1 104 MAC connec tion bal l are de scribed i n Ta b l e 3 thr ough T ...

  • Intel IXF1104 - page 40

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 40 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 TPRTY_0 T PRTY_0 TPR TY_ 1 TPR TY_ 2 TPR TY_ 3 D5 G3 B9 J6 Inpu t 3.3 V LV T T L T ran smit P ari ty . TPRTY in dica te s odd parit y for the TD A T bus. TPR T Y i s va lid on ly w ...

  • Intel IXF1104 - page 41

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 41 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 TM OD 1 TM OD 0 NA D9 A6 In pu t 3.3 V L V TTL TM OD[1:0] Transmit Word M odulo . 32 -bit Mu lti- P HY mod e: T MO D[1 :0] indi cate s th e vali d data by tes of TDA T[31: 0]. D uring tra ...

  • Intel IXF1104 - page 42

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 42 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 DTP A_0 DTP A_1 DTP A_2 DTP A_3 DTP A_0 DTP A_1 DTP A_2 DTP A_3 D3 L1 A9 J7 Output 3. 3 V LV T T L DT P A_0 :3 Di r ect T ran smi t Packe t Available . A di rect st atus ind icat i ...

  • Intel IXF1104 - page 43

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 43 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 P T PA PT PA B 11 O u t p u t 3.3 V L V TTL P olled- PHY Tran smit P acke t Avail able. PT P A all ows th e polli ng of t he port sele ct ed by the T A DR addr ess bus . W hen Hi gh, P TP ...

  • Intel IXF1104 - page 44

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 44 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 RDA T 7 RDA T 6 RDA T 5 RDA T 4 RDA T 3 RDA T 2 RDA T 1 RDA T 0 RDA T7_0 RDA T6_0 RDA T5_0 RDA T4_0 RDA T3_0 RDA T2_0 RDA T1_0 RDA T0_0 F1 4 E1 4 D1 4 C1 3 C1 4 B1 4 A1 4 A1 5 Outp ...

  • Intel IXF1104 - page 45

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 45 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 RERR_0 RERR_0 RERR_1 RERR_2 RERR_3 A16 G17 D20 H20 Ou tp ut 3.3 V L V TTL Receive Error . R ERR ind ica tes tha t the cu rrent pa cket is in error . RERR is only asse rte d wh en REOP is a ...

  • Intel IXF1104 - page 46

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 46 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 REOP_0 REOP_0 REOP_1 REOP_2 REOP_3 C1 6 D1 8 C2 3 J19 Output 3. 3 V LV T T L Re ceive E n d of Pac ket. RE O P in dicate s the end of a pa cket w hen asserted with RV AL. 3 2 - bit ...

  • Intel IXF1104 - page 47

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 47 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 T ab le 4. SerDes Interface Sig nal Descriptions Signa l N ame B a ll Des ign ato r T yp e St an da rd Descri ptio n T X_P _0 T X_P _1 T X_P _2 T X_P _3 Y13 AD13 W16 AC18 Ou tput SerD es T ...

  • Intel IXF1104 - page 48

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 48 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 5 . GM II Interface Sig nal Descri ptions (She et 1 of 2) Signal Nam e Ba ll Des ign ator Ty p e Sta ndar d Desc ripti on TXD7_0 TXD6_0 TXD5_0 TXD4_0 TXD3_0 TXD2_0 TXD1_0 T ...

  • Intel IXF1104 - page 49

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 49 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 RXD7_0 RXD6_0 RXD5_0 RXD4_0 RXD3_0 RXD2_0 RXD1_0 RXD0_0 RXD7_1 RXD6_1 RXD5_1 RXD4_1 RXD3_1 RXD2_1 RXD1_1 RXD0_1 RXD7_2 RXD6_2 RXD5_2 RXD4_2 RXD3_2 RXD2_2 RXD1_2 RXD0_2 RXD7_3 RXD6_3 RXD5_3 ...

  • Intel IXF1104 - page 50

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 50 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 6. RGMI I Interface Signal Descripti ons (Sheet 1 of 2) Signal Nam e Ball Desi gn ator T ype Standar d Descrip tion TXC_0 TXC_1 TXC_2 TXC_3 AA1 AD7 AC20 AB14 Ou tput 2.5 V ...

  • Intel IXF1104 - page 51

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 51 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 RD3_0 RD2_0 RD1_0 RD0_0 RD3_1 RD2_1 RD1_1 RD0_1 RD3_2 RD2_2 RD1_2 RD0_2 RD3_3 RD2_3 RD1_3 RD0_3 Y7 W7 V7 V8 W9 W1 1 Y1 1 Y9 Y2 3 Y2 2 Y2 1 Y2 0 W18 Y1 9 Y1 8 Y1 7 In pu t 2.5 V CMOS Re ce ...

  • Intel IXF1104 - page 52

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 52 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 UPX_DA T A 31 UPX_DA T A 30 UPX_DA T A 29 UPX_DA T A 28 UPX_DA T A 27 UPX_DA T A 26 UPX_DA T A 25 UPX_DA T A 24 UPX_DA T A 23 UPX_DA T A 22 UPX_DA T A 21 UPX_DA T A 20 UPX_DA T A 1 ...

  • Intel IXF1104 - page 53

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 53 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 T ab le 8. T ransm it Pause Control Interface S ignal Descri ptions Signa l N ame Ball Designator T yp e Stan dard D esc rip ti on TXP AUSEADD2 TXP AUSEADD1 TXP AUSEADD0 P21 P20 N20 In put ...

  • Intel IXF1104 - page 54

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 54 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 TX_F AU L T_INT P 23 Open Drai n Output* 2.5 V CMOS T rans mitter Fau lt Interrupt. TX _F AUL T_I NT i s an op en dr a in i nterr u pt o utpu t th at si gn al s a TX _FAUL T con di ...

  • Intel IXF1104 - page 55

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 55 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 T ab le 1 1. LED Interface Signal Descriptions Signa l N ame Ba ll Designator T ype St andard Descripti on LED_CLK K 24 Ou tput 2. 5 V CMOS LED_ CLK is the cl ock ou tput for the L E D b l ...

  • Intel IXF1104 - page 56

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 56 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 4. P ower S upply Signal D escripti ons Signal Name Ball Designator T y pe S tandard Descripti on GND A4 B15 D12 F2 F19 H12 J10 K9 K19 L12 M4 M17 N1 1 P10 R2 R1 1 R23 U8 ...

  • Intel IXF1104 - page 57

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 57 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4.4 Ball U sage Summ ary T ab le 15. Ball Usage Summa ry T ype Q uantity Inpu ts 158 Outputs 12 6 Bi -d ir ecti on al 37 T otal S ign al s 321 Power 75 Grou nd 82 No Co nn ects 74 To t a l ...

  • Intel IXF1104 - page 58

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 58 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 4. 5 M ultip lex ed B all C onn ec tion s 4.5.1 GMII/RGMII/ S erDes/O MI Multiplexed Ba ll Connectio n s T able 16 lists th e balls us e d for t he li ne - si de i nte rfaces (GMII ...

  • Intel IXF1104 - page 59

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 59 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4. 5.2 SP I3 MPHY /SPHY B all Conn ections Ta b l e 1 7 lis ts t he ba lls use d for t he SPI3 Interface and provides a guide to connect thes e ba lls in MPHY and SPHY mode. NC N C TX_FAUL ...

  • Intel IXF1104 - page 60

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 60 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 TERR_0 T ERR_0 A8 MPH Y : U s e TE RR _ 0 as the T ER R sign al. SPHY : Eac h po r t has i ts o wn de dica te d TERR_ n sign al GND TERR_ 1 K1 GND TERR_ 2 E1 1 GND TERR_ 3 J8 TSOP_ ...

  • Intel IXF1104 - page 61

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 61 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4. 6 B al l St ate D ur ing Re se t RERR_0 RERR_0 A16 MP HY : Use RE RR_0 as the RERR si gnal . SPHY : Each po rt has a d edic at ed RERR_ n sign al NC RERR_ 1 G17 NC RERR_ 2 D20 NC RERR_ ...

  • Intel IXF1104 - page 62

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 62 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 JT AG TDO 0x0 – MDIO MD IO Hi gh Z Bi -di rec ti onal MDC 0x0 – CPU U PX _DAT A[3 1:0] Hi gh Z Bi -di rec ti onal UPX _R DY _L 0X1 O p en- drain o utp ut, re quir es an e xt er ...

  • Intel IXF1104 - page 63

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 63 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 4.7 Powe r S upp ly Se qu enci ng Fol low th e powe r - up and powe r-down sequ enc es desc ribed in this se cti on to e nsure correct I XF1 104 MAC operat ion . T he seque nc e des c ribe ...

  • Intel IXF1104 - page 64

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 64 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 4.8 Pull-Up/P ull- Down B all Gu idelin es The signa ls shown in T able 20 requi re the addit ion of a pull-up or pull-d own resis t or to the board des ign for norm a l ope r a ti ...

  • Intel IXF1104 - page 65

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 65 Datasheet Document Nu mber: 27 8757 Revis ion Numb er: 009 Revision Date: 27- Oct-2005 Figu re 6. Anal og Po we r S up pl y Fil ter Ne two rk T ab le 21. Anal og Po wer Balls Signa l N ame Ball Desi gn ator C omme nts A VDD1 P8_1 A5 A20 Ne ed to pr ovide a f ilt er (see Fi g ...

  • Intel IXF1104 - page 66

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 66 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.0 Functio nal Descriptions 5.1 Media Ac cess Cont rolle r (M AC) The IXF1 104 MAC m ain functional bloc k consi sts of four i ndepend ent 10 /100/100 0 Mbps Ethe rne t MA Cs, whi ...

  • Intel IXF1104 - page 67

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 67 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 p ac kets. CRC is r em oved optiona lly fr om re ceive pack ets afte r vali datio n, and is not f o r w ar ded to SPI3. P ack ets wit h a bad CRC are marke d, count ed in the stati s t i ...

  • Intel IXF1104 - page 68

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 68 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 1. 1. 3. 2 Fil ter on M u l t icas t Pack et Ma tc h Thi s feat u re is en ab l ed w he n bit 1 o f the “RX Packe t Filt er Con trol ($ Port_Index + 0x19 ) " = 1. Any fra ...

  • Intel IXF1104 - page 69

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 69 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 Whe n the CRC Error Pa ss Filt er bit = 0 ( “RX Packe t Filt er Cont rol ($ Port_Index + 0x19)” ), it tak e s prec ede nce over the other fi lte r bits. Any packet (Pause, Unic a st, ...

  • Intel IXF1104 - page 70

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 70 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 The IXF1 104 MAC imple ments the IEEE 802.3x sta ndard RX FIFO thr eshol d-ba sed Flow Cont rol in coppe r and fiber modes. When appropria tely programm ed, the MAC can both genera ...

  • Intel IXF1104 - page 71

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 71 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.1.2. 1 .1 Pause F r am e For m at P AUSE frames are MAC con trol frames tha t are padde d to the m inim um size (64 byt e s). Figure 8 and Figure 9 illu s t r at e th e fram e for m a ...

  • Intel IXF1104 - page 72

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 72 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 An IEEE 802.3 MAC P AUSE frame is ide ntifie d by det ec tin g all of the followi ng: • OpCode of 00-01 • Lengt h/T ype f iel d of 88-08 • DA matching the uni que mult icas t ...

  • Intel IXF1104 - page 73

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 73 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.1.2. 1. 3 R es pon se to Rece i ved P AUS E C o mm a nd Fram es When Flow Contr ol is enable d in the re cei ve di rec t i on ( bit 0 in the “FC E nabl e ($ Port_ Index + 0x12)" ...

  • Intel IXF1104 - page 74

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 74 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 23. Valid Decodes for T XP AUSEADD[2:0] TXP AUSEADD_ 2:0 Operati on of TX Pause Con trol In terface 0x0 Tran smi ts a P AU SE fra m e on ev ery por t w ith a pa use _ti m e ...

  • Intel IXF1104 - page 75

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 75 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5. 1.3 Mixed -Mode Operat ion The IXF1 104 MAC gives the user t he option of confi guri ng each por t for 10/100 Mbps h alf-dup le x coppe r , 10/100/1000 Mbps f ull-dupl ex coppe r , or ...

  • Intel IXF1104 - page 76

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 76 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.1. 4 Fiber Mode When the IXF1 104 MAC i s configure d for f ibe r mode, the TX Da ta pat h from the MAC is an in ter nal 10- bit inte rface as des cribed in the IEEE 802. 3z spec ...

  • Intel IXF1104 - page 77

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 77 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 When co nfigured for fiber mode , t he full s et of Optical Mod ule interfac e c ontr ol a nd status sig nals is pr esen te d through re-use of GMII signa ls on a pe r -p ort ba s is (se ...

  • Intel IXF1104 - page 78

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 78 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 by the user . T he RGMII int erface support s ope rat i on a t 10 /100/100 0 Mbps when a ful l-duple x link is est a bl is hed, an d sup ports 10/ 100 Mbps when a half-d uplex lin ...

  • Intel IXF1104 - page 79

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 79 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 The regis t e r shoul d be progr a mmed to 0x266 7 for the 9.6 KB l ength jumbo fra me , opt imiz ed for the IXF1 104 MAC. The RMON counte rs are al s o imp leme nted f or jumbo frame su ...

  • Intel IXF1104 - page 80

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 80 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.1. 7 Packe t Buffer D imens ions 5. 1.7.1 TX and R X FIF O Oper ati on 5. 1.7. 1.1 TX FIFO The IXF1 104 MAC TX FIFOs are impleme nted wi th 10 KB for ea ch chann el. This provide ...

  • Intel IXF1104 - page 81

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 81 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 T ab le 25. RMO N Additional St a tistics (Sheet 1 of 2) R MON Ethe rne t St atisti cs Gr oup 1 Stati sti cs Ty p e IXF1 104 MAC- Equiv alent Sta t is t i c s Ty p e De finition of R MON ...

  • Intel IXF1104 - page 82

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 82 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 1.8.1 C onven tion s The fol lowi ng c onv entions are used throughou t the RMON Management Informati on Base (MIB) and its compa nion docum ents . • Good P ackets : Error -fr ...

  • Intel IXF1104 - page 83

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 83 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 pac ke t s ha ve a vali d prea mb le and SFD, but hav e a bad CRC, or ar e eithe r sho r te r than 64 octe ts or longer th a n 1518 oc te ts. 5.1.8 .2 Ad van t a ges The follo w ing list ...

  • Intel IXF1104 - page 84

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 84 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 The SPI3 i nterface s upports the following two m odes of ope ration: • MPHY o r 32 bit m ode (one 32-bi t dat a bus ) • SPHY or 4 x 8 mode (f our ind ividual 8 -bit d ata buse ...

  • Intel IXF1104 - page 85

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 85 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.2.2 .1 T rans mit Tim ing I n MPHY mode a packe t tra nsm i ssi on s t ar ts wi th the T SX signa l indicati ng port a ddress inform atio n is on the dat a bus . T he ne xt c lock cyc ...

  • Intel IXF1104 - page 86

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 86 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Fi gur e 12 . MPHY Recei ve Logi cal T imin g Figure 13. M P HY 32-Bit Interface B0660-02 TFCLK TENB TDAT[31:0] TPRTY TERR TSX TSOP TEOP Network Processor SPI3 Bus IXF1104 MPHY Mod ...

  • Intel IXF1104 - page 87

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 87 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.2.2 .3 Cloc k R at es I n MPHY mode, the TFC LK and RFCL K can be i nde pe n dent of each othe r . T FCL K and RFCL K sho u ld be commo n to th e IXF11 04 MAC a nd the Ne twork P r oc ...

  • Intel IXF1104 - page 88

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 88 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.2. 2.6 SPHY Logical Timing SPI3 interface A C t i ming for SPHY c an be found in Section 7.2 , “SPI3 AC T iming Spe cific ations ” on page 137 . Logic a l ti m i ng i n the f ...

  • Intel IXF1104 - page 89

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 89 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 Figure 15. SPH Y Receive Logical Timing ...

  • Intel IXF1104 - page 90

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 90 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 2. 2. 8. 1 Cloc k Rates The TFCLK and RFCLK can be i nde pe n dent of each othe r in SPHY mode opera tion. T FC LK and RFCLK s hould be com mon to all the Net work P rocess or d ...

  • Intel IXF1104 - page 91

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 91 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.2.2. 8 .2 Parity The IXF1 104 MAC can be odd or even (the IXF1 10 4 MAC de faults to odd) when ca lc ulating pari ty on the d at a bus. This can be change d to ac com m odat e even pa ...

  • Intel IXF1104 - page 92

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 92 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 The IXF1 104 MAC provid es the follo w ing thr ee types of TP A s igna ls: • Dedic ated per po rt Direct T rans mit P acket A vai lable (DTP A) • Selec ted-PHY T ransm it Packe ...

  • Intel IXF1104 - page 93

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 93 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.2 . 3 Pre - P end ing Fu nct ion The IXF1 104 MAC i m ple m ents a pre -pending f ea ture to allow 1518-b yte Etherne t pac ke ts to be pr e-padde d with two a dditio nal byte s of dat ...

  • Intel IXF1104 - page 94

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 94 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.3. 1 GMII S ignal Mu ltiplexi ng The GMII balls are re assig ned whe n using the RGMII mode or f ibe r mode. T able 16 “Line Side Interf ace Multipl exe d Ba lls ” on page 58 ...

  • Intel IXF1104 - page 95

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 95 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 T ab le 26. GM II Interface Signal Definitions IXF 1 104 MAC Signa l GMII St andard Signa l Sou rce D e scr ipt ion TXC _0 TXC _1 TXC _2 TXC _3 GT X _ C L K IX F1 104 MAC Transm it R e f ...

  • Intel IXF1104 - page 96

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 96 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.4 Reduc ed Gi ga bit Medi a Ind epen de n t Int erf ace ( RGM II) The IXF1 104 MAC supports the RGMII int erfa ce standard as def ined in the RGMII V er si on 1.2 sp ec i fi c a ...

  • Intel IXF1104 - page 97

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 97 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5. 4.2 T iming S p ecifi cs The IXF1 104 MAC RGMII complies wit h RGMII Rev1. 2a requireme nts. T able 27 provi de s the tim i n g s p ec if i c s . 5. 4.3 TX_ ER and R X_ER Codin g T o ...

  • Intel IXF1104 - page 98

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 98 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Figure 19. T X _CTL Behavior Figure 20. RX _CT L Beh avior B0616-02 TXC_0:3 (at Transmitter) TD[3:0]_0:3 TX_CTL_0:3 End-of-Frame TD[3:0] TD[7:4] TX_EN=True TX_ER=False TX_EN=False ...

  • Intel IXF1104 - page 99

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 99 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.4 .3.1 In-Band S tatus Carri er Sense ( CRS) is g enerated by t he PHY when a packet i s re ceived from the network in te rface . CRS is indi ca ted when: • RXD V = tru e . • RXDV ...

  • Intel IXF1104 - page 100

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 10 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.5. 1 MDIO Addres s The 5-bi t P HY addre ss for the MD IO transa c t ions ca n be set in the “M DI O Single Command ($0x680)" . Bit s 5:2 of the PHY ad dres s are fix e ...

  • Intel IXF1104 - page 101

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 101 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 Refer t o Fi gure 42 “MDC Low-S pe e d Opera t i on Tim ing ” on p age 14 5 for the low freque ncy MDC tim ing di a gram. 5. 5.5 Mana gement F r ames The M an a ge m e n t Int erf a ...

  • Intel IXF1104 - page 102

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 10 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Figure 22. M DI St ate Idl e P reamble Go = 1 Cnt = 32 Cnt < 32 St a r t B i ts Cnt = 2 Cnt < 2 Cnt > 32 Cnt > 2 Cnt > 2 Op Code Phy Ad dr Cnt = 2 Cnt < 2 Cnt & ...

  • Intel IXF1104 - page 103

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 103 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5. 5.8 Au toscan Operat ion The au t os ca n fu nc ti o n all o ws th e 32 re g is te rs in each ex t er nal PHY (u p to f our ) to be st ore d inte rnally i n the IXF 1 104 MAC. Autos ...

  • Intel IXF1104 - page 104

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 10 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 spe ed SerDe s and are capabl e of oper a t ing in eith er an AC- or DC-coupl ed en viro nm ent. AC coupl ing is recommende d for this int erface to en su re tha t th e corr e ct ...

  • Intel IXF1104 - page 105

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 105 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.6.2 .3 Rec ei ve r Op er at iona l Ove rvi ew The receive r structure perf orm s Clo c k and Data Rec over y (CDR) on the inco ming seria l da ta st rea m. The qual ity of this oper a ...

  • Intel IXF1104 - page 106

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 10 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 6. 2.6 T ran s mit Ji t ter The S erDe s c ore total t ransmit j itter , inc luding con tributions f rom th e intermedia te freque ncy PLL, is co mpri s ed of the following tw ...

  • Intel IXF1104 - page 107

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 107 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.7 Optical M o dule Interfa ce Thi s secti on de sc ribes the co nnec tion of the IXF1 104 MAC ports to an Optic a l Module Interfa ce and d e tail s the mini m al c onnection s t ha t ...

  • Intel IXF1104 - page 108

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 10 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.7. 2 Func tional De scription s 5. 7. 2.1 High - Spe ed Ser i a l In te r f ace Thes e sig n al s are res pons ible fo r tr an s fer of th e actua l data at 1 .2 5 Gbps. Ta b l ...

  • Intel IXF1104 - page 109

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 109 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.7.2. 2 .2 TX_F A UL T_0 :3 TX_F AUL T_0:3 are input s t o the IXF1 104 MAC. These s igna ls ar e pulled to a log ic Low level by the optical modul e duri ng normal opera tion. A log i ...

  • Intel IXF1104 - page 110

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 11 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 ($0x799)" bits t o lo ok at to ide nti fy th e i nter rupt condit ion s ou rce por t. Howe ve r , th is is a chieve d at the expense of the three de vice signal s. 5.7. 3 I? ...

  • Intel IXF1104 - page 111

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 111 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 1. I nit ial ize th e Cont rol regis ter by se tt ing the fol lowing val ues: a. Enab l e th e I 2 C Contro ller by sett ing bit [25] to 0x1. b. I nitiat e th e I 2 C trans fe r by sett ...

  • Intel IXF1104 - page 112

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 11 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 b. Set the port to be a cc e ss ed by set ting Registe r bits 17:1 6 to 0x3. c. Sel ec t a Wr i te access by sett ing Regist er bit 15 to 0x0. d. Set the Device ID Regis ter bits ...

  • Intel IXF1104 - page 113

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 113 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.7 .3.5 Port Prot ocol Operation 5.7.3 .6 Cloc k an d D a ta T r an s i ti o n s The I 2 C_DA T A is normal ly pul led High with an ext ra devic e. Data on the I 2 C_DA T A pin changes ...

  • Intel IXF1104 - page 114

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 11 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 7.3. 6.3 Ac knowl edge All add ress es and dat a words a re seria ll y trans mitted t o and f rom the op tica l module in 8- bit words . The opt ic a l modul e E²P ROM se nds ...

  • Intel IXF1104 - page 115

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 115 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 The IXF1 104 MAC initi a tes a curre nt address read by sendi ng a de vic e addres s with the Rea d/ W r ite bit set High. The optical module acknowl edges the devic e address and seria ...

  • Intel IXF1104 - page 116

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 11 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.8. 2 LED In terfac e Signal Des cr iption The IXF1 104 MAC LED interface cons is ts of three out put signal s ignal s that are 2.5 V CMOS leve l pads. T able 31 provide s LED s ...

  • Intel IXF1104 - page 117

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 117 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 When im ple m ente d on the bo ard wit h the M54 50 device , th e LED DA T A bi t 1 app e a rs on Out put bit 3 of the M5450 and the LED DA T A bit 2 app ea rs on Output bi t 4, etc. Th ...

  • Intel IXF1104 - page 118

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 11 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Note: The LED_DA T A sign a l is now inv ert e d from the state in Mode 0. 5.8. 5 Powe r-On, Res et, Initi alization The LED int erface is disable d at power -on or re set. The s ...

  • Intel IXF1104 - page 119

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 119 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 Note : The data dec ode of th e LED bits is independen t of the Physi ca l mode sele ct ion. 5.8 .6.1 LED Signaling Be havior Opera tion in eac h mode for th e decoded LED data i n Ta b ...

  • Intel IXF1104 - page 120

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 12 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.8. 6.1.2 Copper LED Behavi or 5.9 CPU Int erfa ce The CPU inte rfa c e bloc k provi de s acce ss to regis te rs and sta tist ic s in the IXF1 104 MAC. The inte rface i s async ...

  • Intel IXF1104 - page 121

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 121 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5. 9.1 Fun ctional D escrip tion 5.9.1 .1 Rea d Ac ce ss Re ad ac ces s in vol ves th e fo llo wi ng: • Dete ct a sserti on of asynchron ous Read c ontrol s ignal and lat ch a ddress ...

  • Intel IXF1104 - page 122

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 12 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 9. 1.3 CPU Ti mi n g Pa ramet ers For informati on on the CPU interface Read and W rite cycle AC timing parameters , re fer to F igure 47 “CPU Interfac e Read Cyc le AC T im ...

  • Intel IXF1104 - page 123

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 123 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5.10 T A P In terf ace ( JT A G) The IXF1 104 MAC includ es an IEEE 1 149.1 compl ia nt T es t Acces s Port (T AP) int erface used during bounda ry s can testi ng. The in terface consis ...

  • Intel IXF1104 - page 124

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 12 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5.10.2 Instruct ion Reg ister an d Support ed Instru ctions The i ns tructi on register i s a 4-bit r e gi st er tha t enacts th e bo unda ry scan in st ruc tions. Aft er t he st ...

  • Intel IXF1104 - page 125

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 125 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 5. 10.3 I D Regist er The ID registe r is a 3 2-bi t re gis ter . The IDCODE instructi on connects thi s registe r bet ween TDI and TDO. See T a ble 112 “J T AG ID ($0x50C) ” on pag ...

  • Intel IXF1104 - page 126

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 12 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Note: There is a restr iction when us ing this loo pback mode. At lea s t one cloc k cyc le is r equi re d betwe e n a T EOP ass ertion and a TSOP a ssert ion. T his i s requir e ...

  • Intel IXF1104 - page 127

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 127 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 When the IXF1 104 MAC is configure d in thi s l oopba c k mode, all of the MAC funct i ons and f ea tures are av ai la b le , includ ing flow control an d pause- pa cke t ge nera tion. ...

  • Intel IXF1104 - page 128

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 12 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 5. 12.1 .1 CLK1 25 The sys te m inte rfa c e c loc k, whi ch s uppl ies the cloc k to the majority of the in ternal cir cui try , is the 125 MHz clock. The sourc e of this c lock ...

  • Intel IXF1104 - page 129

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 129 Datasheet Documen t Numb er: 27875 7 Revis ion Number: 00 9 Re vision Dat e: 27-Oct-2005 • 43/ 5 7 d u ty cy cl e fo r 18 M H z op e r a t io n 5. 12.5 J T AG Cloc k The IXF1 104 MAC support s JT AG . The source of this cloc k must meet the follo wing spe cific ation s: ? ...

  • Intel IXF1104 - page 130

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 13 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 6.0 Appli cations 6.1 Chan ge Por t Mo de In itiali zat ion Se quen ce Use the cha nge port mode ini tializati on sequence aft er powe r -up and anytim e a port is configure d in ...

  • Intel IXF1104 - page 131

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 131 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 Ena ble p acket pa dding and CR C appe ndin g on t ransmit ted packets i n bits 6 and 7, a s ne ed ed . Se t bit 5 t o 0x0. b. Fi ber Mode : W rit e the reserv ed bi ts to the def a ult ...

  • Intel IXF1104 - page 132

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 13 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7.0 Electrical S pecifications T able 39 through T a ble 58 “ LED I nterface AC T iming Parameters ” on page 154 and Figure 35 “SPI3 Re ceiv e Inte rface T iming ” on pag ...

  • Intel IXF1104 - page 133

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 133 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.1 DC Speci fic ati ons The IXF1 104 MAC supports the followi ng I /O buf fer types: • 2.5 V CMOS • 3. 3 V L V T TL • SerDes T ab le 40. Recomm e nded Op erating Condit ions Par a ...

  • Intel IXF1104 - page 134

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 13 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 See Sect ion 5.1.7, “P acket Buf fe r Di mension s” on pa ge 80 for a dditio nal in form ation regardi ng I/O buf fe r types. The relat ed dri ve r character istics are des c ...

  • Intel IXF1104 - page 135

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 135 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7. 1.1 Un dersh oot / Ov er s hoot S pecific ations The overshoo t figures give n in thi s sec ti on represe nt the maxim um voltage th a t can be appl ie d witho ut af f e cting th e re ...

  • Intel IXF1104 - page 136

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 13 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a bl e 4 5 . R GM I I Po we r Symbo l P arame ter Condi ti ons Min Max Uni ts V OH Out put Hig h V o ltag e I OH = -1.0 M A; V DD = M IN 2. 0 VD D + .3 V V OL Out put Lo w Volt ...

  • Intel IXF1104 - page 137

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 137 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7. 2 S PI 3 A C T iming S pec ifi cat i o ns 7. 2.1 Receive Int erf ace T imi ng Fi gure 35 a nd T able 46 ill ustra te and provi de SP I 3 rec e ive int e r fa ce ti m ing infor m ati o ...

  • Intel IXF1104 - page 138

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 13 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 46. SPI3 Receive Interface S ignal Par ameters Symbol Param eter Min M ax Un its – R FC L K freq uency 90 1 3 3 MHz – R FCLK du ty cyc l e 45 55 % T srenb RENB set up ...

  • Intel IXF1104 - page 139

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 139 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7. 2.2 T ransmit In terface T imin g Fi gure 36 a nd T able 47 il lu st r at e an d pr o v id e SPI 3 tr an s m it in te r f ac e ti m i ng in f o r ma ti o n. Figure 36. SPI3 T ran smi ...

  • Intel IXF1104 - page 140

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 14 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 47. SPI3 T ran sm it Interface Signa l Parameters Sy mbo l Par a me ter Mi n M ax U n its – T FCL K fr eq ue ncy – 1 33 MHz – T FC LK duty cycle 45 55 % TStenb TE N ...

  • Intel IXF1104 - page 141

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 141 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.3 RGMII AC T imin g Specific ati on Fi gure 37 a nd T able 48 provid e RGMII interface timin g paramete rs . Figu re 37 . RG MII I nte rfa ce Timing T ab le 48. RGMII Interface Timing ...

  • Intel IXF1104 - page 142

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 14 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7.4 GMII A C Timing Spec ificat ion 7.4. 1 100 0 Base -T Oper ation Figure 38 and Figure 39 and T able 49 and T able 50 provid e GMII AC tim ing spec ifica tions . 7. 4.1.1 100 0 ...

  • Intel IXF1104 - page 143

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 143 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.4.1 .2 1000 BA SE -T Rece i ve Inte rfac e Figure 39. 100 0BASE-T Re ceive Inter f ace Timing T ab le 50. GMII 1000BAS E- T Receive Signal Parame ters Symbol P aramete r Min T yp 1 Max ...

  • Intel IXF1104 - page 144

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 14 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7.5 SerD es A C Ti ming S pec i fic ati on Figure 40. S er Des Timing Diagram T abl e 5 1. S erDes Timi ng P ar amet ers Sy mbo l Par a me ter Mi n M ax U n its Tt Transmi t e ye ...

  • Intel IXF1104 - page 145

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 145 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.6 MDIO AC Timing Sp ecifica tion The MDIO Int erface on the IXF1 104 M AC ca n opera t e in two modes – l ow-speed and h igh-speed. I n lo w - sp ee d mode, th e M D C cl o ck si g n ...

  • Intel IXF1104 - page 146

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 14 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7.6.3 MDIO AC Tim ing Figur e 43 . MDIO W rite T iming Diag ram Figure 44. M DI O Read Ti ming Diag ram T a bl e 5 2 . M D IO Ti min g Pa r am et ers Para mete r Sy mbol M in T y ...

  • Intel IXF1104 - page 147

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 147 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.7 Optical M o dule and I 2 C A C Ti mi ng Sp eci fic at ion 7. 7.1 I 2 C Int erface Timi ng Fi gure 45 a nd Figur e 46 il lus trat e bus timing and write cyc le , a nd Ta b l e 5 3 sh ...

  • Intel IXF1104 - page 148

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 14 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 t SU .S T A St art se tup ti me 4.7 – µs t HD.DA T D ata in hold ti me 0 – µ s t SU .DAT Data in setu p time 200 – ns t R Inp uts rise ti me – 1.0 µ s t F Inp uts fa l ...

  • Intel IXF1104 - page 149

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 149 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.8 CPU AC Timing S p e cifica tion 7. 8.1 CPU Inter face Read Cycle AC T iming Fi gure 47 , Figur e 48 , a nd T able 54 i ll ustr ate the CPU in ter fa ce r ead and writ e cy cle AC t i ...

  • Intel IXF1104 - page 150

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 15 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 5 4. CPU I nterface W rite Cycle AC Signal P arameters Symb ol Par ameter Min Max T cas Ad dress, chip sel ect set up time 5 ns – T cah Addr ess, chi p sel ect hol d ti ...

  • Intel IXF1104 - page 151

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 151 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7. 9 T rans mit Paus e Contr ol A C T imi ng Sp ecif ica tio n Fi gure 49 a nd T able 55 show th e pause cont rol AC ti m i ng sp e cifi cations . The Paus e Control inte rface operate s ...

  • Intel IXF1104 - page 152

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 15 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7. 10 JT A G AC Timi ng Speci fic ati on Figure 50 and T a bl e 56 prov ide t he J T AG AC timing spec ifi cations. Figure 50. JT AG AC T iming T a ble 5 6. JT AG AC Timing Param ...

  • Intel IXF1104 - page 153

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 153 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 7.1 1 Syst em AC Timing Specif icati on Fi gure 51 a nd T able 57 illust rat e the syste m reset AC timin g spec ifica tion s. Figure 51. System Reset AC Timing T ab le 57. Sy stem Re se ...

  • Intel IXF1104 - page 154

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 15 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 7. 12 LED AC Tim ing Spec ifi catio n Figure 52 and T a bl e 58 prov ide the LED AC tim ing spe ci fications. Fi gur e 52 . LED AC In te rf ac e T i min g T a ble 58. LED Interfa ...

  • Intel IXF1104 - page 155

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 155 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8.0 Register Set The re gisters s hown in thi s secti on pr ovide acc es s for c onfiguratio n, alarm m onitori ng, and c ontrol o f t he ch ip. T able 59 “MAC Contro l Reg isters ($ P ...

  • Intel IXF1104 - page 156

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 15 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.3 Per P o r t Re gist ers Secti on 8. 4 covers all of th e regis ters that are repli ca te d in each port o f the IXF1 104 MAC. These regis ters perform a n iden tical f unctio ...

  • Intel IXF1104 - page 157

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 157 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 “Max Fr am e S ize (A ddr: P or t_Ind ex + 0x 0F)” 32 R/W 16 6 0x0F “ MA C IF Mode an d RG MII S p eed ( $ P ort _In dex + 0x 10) ” 32 R/ W 167 0x1 0 “ F lush TX ( $ P ort _Ind ...

  • Intel IXF1104 - page 158

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 15 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 RxUnknownMacControlFrameCount er 32 R 17 4 0x 33 RxV eryL ongErrors 32 R 17 4 0x 34 RxRuntErrors 32 R 17 4 0x 35 RxShortErrors 32 R 17 4 0x 36 RxCarrierExte ndError 32 R 17 4 0x ...

  • Intel IXF1104 - page 159

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 159 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 62. PHY Autoscan Registers ($ Por t Index + Offset ) Reg ister Bit S i z e Mo de 1 Re f Page Offset “ P HY C ontr ol ($ Port In de x + 0 x 60)” 32 RO 18 1 0x60 “ P HY Statu ...

  • Intel IXF1104 - page 160

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 16 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 “R X F I F O Low W ate r mark Po r t 3 ( $0x58D )” 32 R/W 195 0x 58 D Re ser ved 32 RO – 0x58E - 0x5 93 RX F IFO Ov erflo w Fra me Drop Coun ter Por t 0 3 2 R 19 5 0x594 RX ...

  • Intel IXF1104 - page 161

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 161 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 Rese rve d 32 RO – 0x60 E - 0x 613 TX FIFO MAC Thr eshold Port 0 32 R/W 20 5 0x61 4 TX FIFO MAC Thr eshold Port 1 32 R/W 20 5 0x61 5 TX FIFO MAC Thr eshold Port 2 32 R/W 20 5 0x61 6 TX ...

  • Intel IXF1104 - page 162

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 16 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Re served 32 R – 0x70 2 - 0x7 09 “Address Pa rity Error Packet Drop C ounter ($0x7 0A)” 32 R 219 0x 70 A Re ser ved 32 R – 0x70B - 0x7 16 T a ble 6 8. SerDes Reg isters ( ...

  • Intel IXF1104 - page 163

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 163 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8.4.1 MAC Control Registers Ta b l e 7 0 through T able 92 “Port Multi ca s t Address ($ Po rt_In dex +0x1A – +0x1B )” on page 173 pr ovid e de t ai ls on the control an d statu s ...

  • Intel IXF1104 - page 164

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 16 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 73. Collision Di stance ($ Port_Index + 0x05) Name Desc ripti on Add res s T y pe 1 Default Col lisio n Distance This is a 1 0-bit valu e that s e t s the limi t f or lat ...

  • Intel IXF1104 - page 165

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 165 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 77. IPG Receive Time 1 ($ Port_Index + 0x0A) Name Descriptio n Address T ype 1 Default IPG Rec ei ve T im e 1 Th is tim e r is use d du rin g half -du pl ex ope ra tio n whe n th ...

  • Intel IXF1104 - page 166

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 16 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 8 0. P ause T hreshold ($ Port_I ndex + 0x0E ) Name De scription Address T ype 1 De fault Pause Thres hold W hen a pa use fram e has be en se nt , a n i nte rn al time r ...

  • Intel IXF1104 - page 167

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 167 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 82. MAC I F M ode an d RGM II Speed ($ Port_Index + 0x10) Bi t Nam e Des crip tion T y pe 1 Default Reg ister D e scrip tion – M A C IF Mo de: Det er min es t he MA C op e rati ...

  • Intel IXF1104 - page 168

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 16 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 8 4. FC Enab le ($ Port_Index + 0 x12) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: Ind icat e s which f low co ntrol mod e is used f or t he RX ...

  • Intel IXF1104 - page 169

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 169 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 86. Short Runts Thresho ld ($ Port_Ind ex + 0x14) Name Descripti on Address T ype 1 Default Shor t Runt s Th res hol d The 5- bit conf igura tio n hold s th e value in by tes, wh ...

  • Intel IXF1104 - page 170

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 17 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 19 RX Co nfi g 0 = Rec ei ving id le/d at a st r eam 1 = Recei ving /C / order ed set s RO 0 18 Con fig C hange d 0 = RxCo nfi gWor d has chan ged si nc e last rea d 1 = RxC onf ...

  • Intel IXF1104 - page 171

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 171 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 13:1 2 2 Rem ote Faul t [1:0 ] Remo te fa ult d efini tions : 00 = No er ro r , lin k oka y 01 = Off line 10 = Li nk fa il ure 1 1 = Auto -nego t i ati on_Er ror R/W 00 1 1: 9 Res er ved ...

  • Intel IXF1104 - page 172

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 17 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 3:2 2 Rese rved Writ e a s 1, ig nore on Re ad . R/ W 1 1 1 2 Re served Wr it e as 0, ig nor e on Re ad . R/ W 0 0 2 Re served Wr it e as 1, ig nor e on Re ad . R/ W 1 T a ble 90 ...

  • Intel IXF1104 - page 173

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 173 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2 B/Cas t Drop En T his b it ena ble s a G loba l fi lt er o n br oad c ast f rames . 0 = All br oadc as t frame s are p assed to the S P I3 Inte rfa ce. 1 = All br oadc as t fram e s ar ...

  • Intel IXF1104 - page 174

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 17 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.4. 2 MAC RX S ta tistics Reg ister O verview The MAC RX Stati s tics re gisters c ontain th e MAC re c e ive r statist ic c ounters a nd are cl eare d whe n re ad. Th e s oftw ...

  • Intel IXF1104 - page 175

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 175 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 RxP kts 65to 12 7 Octet s T he to tal nu mber of pac kets re ce ived (i nc ludi ng bad packets ) tha t we re 65 -127 octets i n len gth. Inc reme nted for tag ged p ackets with a le ngth ...

  • Intel IXF1104 - page 176

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 17 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 RxAlignErrors 3 Fra mes with a le gal fram e siz e, but c o ntai ning less than eig ht ad ditio nal b its. T his occur s wh en the frame is not by te alig ned. The CRC of th e fr ...

  • Intel IXF1104 - page 177

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 177 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 RxRuntE rrors 3 T he to tal nu mber of pac kets re ce ived th at ar e les s tha n 64 oct ets in leng th, b ut long er tha n or equ al to 96 b it tim es, which cor respo nds to a 4- by te ...

  • Intel IXF1104 - page 178

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 17 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.4. 3 MAC T X St ati stics R egister Overview The M A C TX S tat is tics r egi ste rs conta in all th e MAC t r an sm i t stat istic co unte r s and ar e clear ed wh en read . T ...

  • Intel IXF1104 - page 179

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 179 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 Tx BCP kt s Th e t otal nu mber of broad cast p acke ts tran s mi tte d (ex c l ud in g ba d pac ke ts) . Por t _Ind ex + 0x 44 R 0 x000 00 00 0 TxP kts64 Octets Th e tota l numb er of p ...

  • Intel IXF1104 - page 180

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 18 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 TxSin gl eCo llis io ns A cou n t of successf ully t ransmi t t e d fr ame s on a par t icul ar inter face w h er e th e tr ans mi ssio n is in hi bit ed b y exa ctl y one co ll ...

  • Intel IXF1104 - page 181

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 181 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8. 4.4 PH Y Auto sca n Regi sters Note : These re gis t er hold th e current value s of the P HY regi s ters onl y when Autos ca n (s ee Section 5.5.8, “Auto s can Operat ion” on pag ...

  • Intel IXF1104 - page 182

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 18 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 12 Au to-N egot iat ion Enable 0 = Dis ab le au to -ne got iati on pr oces s 1 = Enabl e a ut o-neg ot ia tio n pr oce ss Thi s regi ster bi t m ust be en able d f or 1000BASE -T ...

  • Intel IXF1104 - page 183

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 183 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 11 10 M bps Ha lf -Dup lex 0 = PHY not ab le to oper ate in 10 M b ps in ha lf - dupl ex m ode 1 = PH Y able to ope rat e i n 10 M bps in h al f- dupl ex m ode RO 1 10 100 BASE-T2 Fu ll- ...

  • Intel IXF1104 - page 184

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 18 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 9 8. PH Y Identification 2 ($ Port I ndex + 0x 63) Bi t Nam e Des cri pt io n Type 1 De fault 0 x 0 0 11 11 0 0 1 0000 0000 31: 16 R eser ve d Res erve d RO 0 15:1 0 PHY ...

  • Intel IXF1104 - page 185

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 185 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 6 10B ASE-T Fu ll- Duple x 0 = DTE i s not 1 0B ASE-T , f ull-d uple x m o de capa bl e 1 = DT E is 1 0BASE-T , ful l-duple x mode capab le RO 1 5 10B ASE-T Ha lf -Dup lex 0 = DT E is no ...

  • Intel IXF1104 - page 186

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 18 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8 100B A SE-T X Fu ll- Dup le x 0 = L ink partner i s no t 100 BASE-TX, fu ll-duple x mo de capa bl e 1 = Lin k par tner i s 10 0BA SE-TX, fu ll -dupl ex mo de capa ble RO 1 7 10 ...

  • Intel IXF1104 - page 187

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 187 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2 Next Pa ge Ab le 0 = L oc al d ev ice is not N ex t Pa ge abl e 1 = Loca l devi ce is Ne xt Pa ge abl e RO 0 1 Pag e Re c eive d I ndic ate s that a ne w pag e ha s be en r ece iv ed a ...

  • Intel IXF1104 - page 188

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 18 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.4. 5 Global St atus an d Conf iguration Registe r Overv iew Ta b l e 1 0 3 through T a ble 1 12 “J T AG ID ($0x50C)” on pag e 192 provid e an ov ervi ew for th e Gl obal Co ...

  • Intel IXF1104 - page 189

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 189 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 105 . Link LED Enable ($0x50 2) Bi t Nam e D escr ip t io n T y pe 1 Default Reg ister D e scrip t i o n : Per port b it sh ould be s et u pon d etec tion of li nk to ena ble pro ...

  • Intel IXF1104 - page 190

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 19 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 107. MDIO Soft Reset ($0x506) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: Sof twa re- a ctiv at ed rese t of the MDIO mod ule. 0 x0000 00 00 31: ...

  • Intel IXF1104 - page 191

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 191 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 1 10. L ED Flash Rate ($0x50A) Bi t Nam e Des crip tion T y pe 1 Default Reg ister D e scrip t i o n : Glob al sel ec tion of LE D fl as h r ate . 0x 00 0000 00 31: 3 Re ser ved ...

  • Intel IXF1104 - page 192

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 19 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 12 . JT AG ID ($ 0x50C) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: T he value of t h is re gist er fol l ows the same sch em e as th e devi c ...

  • Intel IXF1104 - page 193

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 193 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8. 4.6 RX F IFO Regist er Overview T a ble 11 3 thro ugh T able 13 1 provide an o ve rv iew of the RX FIFO regis te rs, wh ich inc l ud e the R X FIFO High a nd Low watermarks. T ab le 1 ...

  • Intel IXF1104 - page 194

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 19 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 16. RX FIFO High W a termark P ort 3 ($0x583) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: The d e fau lt va lu e of 0x 0E 6 re p resen ts 23 0 ...

  • Intel IXF1104 - page 195

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 195 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2 T ab le 1 19. RX FIFO Low Watermark Po rt 2 ($0x58 C) Bi t Nam e Des crip tion T y pe 1 Default Reg ister D e scrip t i o n : T he d efa ul t va lu e of 0x 07 2 re pres en ts 114 ei gh ...

  • Intel IXF1104 - page 196

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 19 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 122. RX FIFO Port Reset ($0x59E) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: The so ft re set re gist er for each port in the RX blo ck. Port ID ...

  • Intel IXF1104 - page 197

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 197 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2 RX FIF O Errore d F rame Dr op E na ble Po rt 2 This bit i s us ed in co njunct ion wi th MA C filt e r b it s. Thi s all ows t he us er to sel ect wh ethe r the erro red pac ke ts a r ...

  • Intel IXF1104 - page 198

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 19 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 25. RX F IFO Errored Frame Dr op Co unter Po rt s 0 - 3 ($0x5 A2 - 0x5A5) (S heet 1 of 2) Name De scrip tion Address T ype Default RX FIFO E rrored Fr ame Dr op Co unte ...

  • Intel IXF1104 - page 199

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 199 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 RX FIF O Errore d F rame Dr op C o unte r on P ort 2 This regist er coun ts a l l fra mes drop ped fr om the RX FIF O for por t 2 by mee tin g on e of the fol lowin g cond it ion s: • ...

  • Intel IXF1104 - page 200

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 127. RX FIFO Padding and CRC S trip Enab le ($0x5B 3) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: This c ont rol r egi st er en able s to pre -p ...

  • Intel IXF1104 - page 201

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 201 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 128 . RX F IFO T ransfer T hreshold P ort 0 ($0x5B8 ) Bit Nam e Des crip tion T ype Def ault Reg ister D e scrip t i o n : RX F IF O tr an sfe r t hre sh ol d for po rt 0 i n 8 - ...

  • Intel IXF1104 - page 202

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 130. RX FIFO T ransfer Thresh old Port 2 ($0x5BA) Bi t Nam e D escr i ptio n T yp e De fa ult Reg iste r De sc ript ion: RX F IFO t rans fer thres hold for p ort 2 in 8-b ...

  • Intel IXF1104 - page 203

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 203 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8. 4.7 TX FIFO R egi ster Ove r vie w T a ble 13 2 thro ugh T able 139 provid e an over view of the TX FI F O regi ster s, which in clude the TX FIFO High a nd Low watermark. T ab le 132 ...

  • Intel IXF1104 - page 204

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 33. TX FIFO L ow Watermar k Register Ports 0 - 3 ($0 x60A – 0 x60D) Na me Desc ript io n Addr ess T ype 1 De fault TX FIFO Lo w W a terma rk Port 0 Low watermark fo r ...

  • Intel IXF1104 - page 205

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 205 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 134 . TX F IFO M AC Thre shold Reg ister Po rts 0 - 3 ($0x614 – 0x 617) Name Desc ription Address T ype 1 D efault TX FIFO MAC T hre sh ol d Por t 0 MAC thr eshol d fo r TX FIF ...

  • Intel IXF1104 - page 206

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 35. TX FIFO O verflow/Un derflow/Out o f Seq uence Event ($0x61E ) (Sh eet 1 o f 2) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De scr ipti on: TX FIFO Out o ...

  • Intel IXF1104 - page 207

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 207 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2F O E 2 Por t 2 0 = FIFO ov er flow ev e nt di d no t occ ur 1 = FIF O o ver fl ow even t o c cur red R0 1F O E 1 Por t 1 0 = FIFO ov er flow ev e nt di d no t occ ur 1 = FIF O o ver fl ...

  • Intel IXF1104 - page 208

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 20 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 2P o r t 2 R e s e t Port 2 0 = De- a sse rt R ese t 1 = Ass e rt R e set R/W 0 1P o r t 1 R e s e t Port 1 0 = De- a sse rt R ese t 1 = Ass e rt R e set R/W 0 0P o r t 0 R e s e ...

  • Intel IXF1104 - page 209

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 209 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 139. TX FIFO Erro red Fr ame Drop Counte r P o rts 0 - 3 ($0x 625 – 0x629) Name Descri ption Addre ss T ype * Default TX FI FO erro red f rame dr op cou nt er on P ort 0 Thi s ...

  • Intel IXF1104 - page 210

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 21 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 1 40. TX FIFO Occupancy Co unter fo r Po rt s 0 - 3 ($0x62D – 0x 630) Na me D e scr ipti on A ddr ess T ype Defau lt Occ upanc y for T x FIFO Port 0 Thi s regi ste r gi ...

  • Intel IXF1104 - page 211

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 211 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8. 4.8 MDIO R egiste r Overview T able 142 through T able 145 pro vide an overview of the MDIO r egisters. T ab le 142 . MDIO S ingle Comm an d ($0x680) Bi t Nam e Des cri ptio n T ype 1 ...

  • Intel IXF1104 - page 212

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 21 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 T a ble 144. Autoscan PHY Address Enab le ($0x682 ) Bi t Nam e Des cri pt io n Type 1 De fault Reg iste r De sc ript ion: De f i ne s vali d PH Y add resses . Each b it enab les ...

  • Intel IXF1104 - page 213

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 213 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 8. 4.9 SPI 3 Registe r Overview T able 146 through T abl e 148 “A ddress Pari ty E rr or Packet Drop Cou nter ($0x70A)” on page 219 pr ovid e a n overvi e w of the SPI3 reg is te rs. ...

  • Intel IXF1104 - page 214

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 21 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 16 Dat _prtye r_dr p Port 0 SPHY/ MPHY Mode: Ind ica tes wh et her to dr op pa ck ets w i th da ta pa rit y error for p ort 0. 0 = Do n ot dro p pack ets wit h data par ity e rr ...

  • Intel IXF1104 - page 215

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 215 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 2 Tx_p or t_ena ble P or t 2 SPH Y Mo de: 0 = Di sabl es th e se le ct ed S PI 3 T X p or t 2 1 = Ena bl es the sel ect ed SP I 3 TX por t 2 MPHY M ode: 0 = Di sabl es th e se le ct ed S ...

  • Intel IXF1104 - page 216

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 21 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 2 5 B 2B_ P AU SE P or t 1 SPHY M ode: Ind icates the nu mb er of pau se cycl es to be int roduc ed betw een b ack- to -back t ran sfers fo r por t 1. 0 = Zero paus e cy cl es 1 ...

  • Intel IXF1104 - page 217

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 217 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 15 Rx_ pari ty _sen se Po rt 3 SPHY Mode: In dicate s the pa rity se ns e to ch eck the p ar it y on RDA T bus for p ort 3. 0 = Odd Par it y 1 = Eve n Pari ty MPH Y M od e: NA R/W 0x0 14 ...

  • Intel IXF1104 - page 218

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 21 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 9 Rx _port _ena ble Port 1 SPHY M ode: 0 = Dis ab le s the sel ec te d S PI3 RX po rt . 1 = Enabl es the s elec ted SP I3 RX p ort . MPHY Mo de : 0 = Dis ab le s the sel ec te d ...

  • Intel IXF1104 - page 219

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 219 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 148. Address Pari ty Error Pa cket Drop Coun ter ($0 x70A) Bi t Nam e Des crip tion T y pe 1 Default Reg ister D e scri ption : T his reg ister count s the nu mber of pa cke ts d ...

  • Intel IXF1104 - page 220

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 22 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.4. 10 SerDe s Register Ove rview T able 149 through T able 152 “C l oc k and Interfa c e Mode Cha nge Enable Ports 0 - 3 ($0x794 )” on page 221 defin e the cont ent s of th ...

  • Intel IXF1104 - page 221

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 221 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 152 . Clock and Interface Mode Change E nable Port s 0 - 3 ($0x794) Bi t Nam e Des crip tion T ype 1 Defa ult Reg ister D e scri ption : T his reg ist er is us ed w hen a c ha ng ...

  • Intel IXF1104 - page 222

    Inte l ® IXF1 104 4 -Port G igabit Et hernet Media A ccess Controller Datasheet 22 2 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 8.4. 1 1 Op tical Mo dule Reg ister Ove r vi ew T able 153 through T able 156 “I 2 C D a ta Ports 0 - 3 ($0x79F )” on pag e 223 provi de an o vervie w of th e Opti c al Modul ...

  • Intel IXF1104 - page 223

    In te l ® I XF1 104 4-Port Gigab it Ethern et Media Acces s Controller 223 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 T ab le 155. I 2 C Co ntro l Ports 0 - 3 ($0x79B) Bi t Nam e Des crip tion T y pe 1 Default Re gist er Desc ri pti on: Thi s regi ster contr ols and m onitor s t he int erfa ce to the op ...

  • Intel IXF1104 - page 224

    Intel ® IXF1 104 4 -Port G igabit Ethe rnet M edia A ccess Con troller Datasheet 22 4 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 9.0 Mechanical Speci fications The IXF1 104 MAC is pa ck a ged in a 576-ball BGA pac kage wit h 6 balls re m oved di a g onal ly from eac h corne r , for a tot al of 55 2 balls ...

  • Intel IXF1104 - page 225

    In te l ® I XF1 104 4-Port Gigab it Ethernet Media Access Contro ller 225 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 9. 3 P acka ge In fo r ma tio n 9. 3.1 CBGA Pack age Diagr ams Fi gure 55 a nd Figure 56 i ll ustrate the CBGA top , bot tom , and side pa ckage vi ews . Figure 55. CBGA Package Diagram B ...

  • Intel IXF1104 - page 226

    Intel ® IXF1 104 4 -Port G igabit Ethe rnet M edia A ccess Con troller Datasheet 22 6 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Figure 56. CB GA Pa ckage Side View Diagram B0555-01 Seating Plane 0.15 C (4.237 Max) (3.619 Min) (3.327 Max) (2.809 Min) (0.857 Max) (0.779 Min) (4.16 Max) (3.43 Min) (6X) (3.2 ...

  • Intel IXF1104 - page 227

    In te l ® I XF1 104 4-Port Gigab it Ethernet Media Access Contro ller 227 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 9. 3.2 Flip Chip-P lastic B all Grid Array Pack age Diagr am Fi gure 57 illu strates the F C-PBGA top and bot tom package views and Figure 58 li sts t he F C- PB GA me cha n ical sp e cif ...

  • Intel IXF1104 - page 228

    Intel ® IXF1 104 4 -Port G igabit Ethe rnet M edia A ccess Con troller Datasheet 22 8 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2005 Figure 58. F C -PBGA Me chan ical Specifications ...

  • Intel IXF1104 - page 229

    In te l ® I XF1 104 4-Port Gigab it Ethernet Media Access Contro ller 229 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 9. 3.3 T op Labe l Mark ing Exampl e Fi gure 59 shows the IXF1 104 MAC non-RoHS-compl iant devic e marki ng lab el . No te: I n cont ras t to the Pb-Fre e (RoHS-c omp liant ) package , th ...

  • Intel IXF1104 - page 230

    Int el ® IXF1 1 04 4-Po rt Gig abit Et hernet Media A ccess Control ler Datasheet 23 0 Documen t Numbe r: 2 78757 Re vi sion N u mber : 009 Re vi sion D a te: 27- Oct- 2 00 5 10.0 Produ ct Orderi ng In f o r m a ti on T able 157 and Fi gure 60 pro vide IXF1 104 MAC product or dering informati on. T a ble 157. Product In f orma tio n Pr odu c t Nu ...

  • Intel IXF1104 - page 231

    In tel ® IXF 1 104 4-Port Gigab it Eth ern et Media Access Contro ller 231 Datasheet Docume nt Num ber: 2787 57 Revision Number: 0 09 Revision Da te: 27-O ct-2005 Figure 60. Orderi ng Informat i on – Sample HF E 1104 C IXF B0 Pr o d uc t Re vi si on xn = 2 Al p hanume ric cha racter s Tem per ature Ra nge A = A mbient (0 – 55 0 C) C = Comme rc ...

Manufacturer Intel Category Computer Hardware

Documents that we receive from a manufacturer of a Intel IXF1104 can be divided into several groups. They are, among others:
- Intel technical drawings
- IXF1104 manuals
- Intel product data sheets
- information booklets
- or energy labels Intel IXF1104
All of them are important, but the most important information from the point of view of use of the device are in the user manual Intel IXF1104.

A group of documents referred to as user manuals is also divided into more specific types, such as: Installation manuals Intel IXF1104, service manual, brief instructions and user manuals Intel IXF1104. Depending on your needs, you should look for the document you need. In our website you can view the most popular manual of the product Intel IXF1104.

Similar manuals

A complete manual for the device Intel IXF1104, how should it look like?
A manual, also referred to as a user manual, or simply "instructions" is a technical document designed to assist in the use Intel IXF1104 by users. Manuals are usually written by a technical writer, but in a language understandable to all users of Intel IXF1104.

A complete Intel manual, should contain several basic components. Some of them are less important, such as: cover / title page or copyright page. However, the remaining part should provide us with information that is important from the point of view of the user.

1. Preface and tips on how to use the manual Intel IXF1104 - At the beginning of each manual we should find clues about how to use the guidelines. It should include information about the location of the Contents of the Intel IXF1104, FAQ or common problems, i.e. places that are most often searched by users in each manual
2. Contents - index of all tips concerning the Intel IXF1104, that we can find in the current document
3. Tips how to use the basic functions of the device Intel IXF1104 - which should help us in our first steps of using Intel IXF1104
4. Troubleshooting - systematic sequence of activities that will help us diagnose and subsequently solve the most important problems with Intel IXF1104
5. FAQ - Frequently Asked Questions
6. Contact detailsInformation about where to look for contact to the manufacturer/service of Intel IXF1104 in a specific country, if it was not possible to solve the problem on our own.

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