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Cypress CY7B9911V - page 1
CY7B991 1V 3.3V RoboClock+™ High Sp eed Low V olt age Programmable Skew Clock Buffer Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-07408 Rev . *D Revised June 20, 2007 Features ■ All output pair skew <100 ps typical (250 max) ■ 3.75 to 1 10 MH z output operation ...
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Cypress CY7B9911V - page 2
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 2 of 14 Pin Configuration Pin Definitions Signal Name IO Description REF I Reference frequency input. This input supplies t he frequency and timi ng against which all functional variations ar e me asu re d . FB I PLL feedback input (typically conn ected to one of the e ight outp ...
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Cypress CY7B9911V - page 3
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 3 of 14 Block Diagram Description Phase Frequency Detect or an d Filter The Phase Frequency Detector and Filter blocks accept inputs from the Reference Frequency (REF) input an d the Feedback (FB) input. They generate correct ion information to control the frequency of the V olt ...
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Cypress CY7B9911V - page 4
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 4 of 14 Figure 1 shows the typical outputs with FB connected to a zero skew output. [4] T est Mode The TEST input is a three level input. In normal system operation, this pin is connect ed to groun d, allowing the CY7B991 1V to operate as described in “Block Diagram Descriptio ...
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Cypress CY7B9911V - page 5
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 5 of 14 Operational M ode Descriptions Figure 2 shows the L VPSCB configured as a zero skew clock buffer . In this mode the CY7B991 1V is used as the basis for a low skew clock distribution tree. When al l the function select inputs (xF0 , xF1) are left open, each of the outputs ...
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Cypress CY7B9911V - page 6
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 6 of 14 groups, and the PLL aligns the rising edges of REF and FB, you can create wider output skews by proper selection of the xFn inputs. For example, a +10 tU between REF and 3Qx is achieved by connecting 1Q0 to FB and setting 1F 0 = 1F1 = GND , 3F0 = MID, and 3F1 = High. (Si ...
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Cypress CY7B9911V - page 7
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 7 of 14 frequency , while still maintaining the low ske w characteristics of the clock driver . The L VPSCB pe rforms all of the functions described in this section at the same time. It can multiply by two and four or divide by two (and four) at the same time. This shifts its ou ...
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Cypress CY7B9911V - page 8
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 8 of 14 Maximum Ratin gs Operating outside these boundaries may affect the performance and life of the d evice. These user guidelin es are not tested. S torage T emperature ................ .............. ... –65°C to +150°C Ambient T e mperature with Power Applied ......... ...
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Cypress CY7B9911V - page 9
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 9 of 14 Cap acit ance T ested initially and after any design or proce ss chang es that may affect these parameters. [10 ] Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 25°C, f = 1 M H z , V CC = 3.3V 10 pF Note 10. Applies to REF and FB input s on ...
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Cypress CY7B9911V - page 10
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 10 of 14 Switching Characteristics – 7 Option Over the Operating Range [2, 1 1] Parameter Description CY7B 991 1V -7 Unit Min T yp Ma x f NOM Operating Clock Frequency in MHz FS = LOW [1, 2] 15 30 MHz FS = MID [1, 2] 25 50 FS = HIGH [1, 2 , 3] 40 1 10 t RPWH REF Pulse Width HI ...
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Cypress CY7B9911V - page 11
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 1 1 of 14 AC Timing Diagrams t ODCV t ODCV t REF REF FB Q OTHER Q INVERTED Q REF DIVIDED BY 2 REF DIVIDED BY 4 t RPWH t RPWL t PD t SKEWPR, t SKEW0, 1 t SKEWPR, t SKEW0, 1 t SKEW2 t SKEW2 t SKEW3, 4 t SKEW3, 4 t SKEW3, 4 t SKEW1, 3, 4 t SKEW2, 4 t JR [+] Feedback ...
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Cypress CY7B9911V - page 12
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 12 of 14 Ordering Information Accuracy (ps) Ordering Code Package T ype Operating Range 500 CY7B991 1V -5JC 32-Pb Plasti c Leaded Chip Carrier Commercial 500 CY7B991 1V -5JCT 32 -Pb Plastic Le aded Chip Carri er – T ape and Reel Commercial 700 CY7B991 1V -7JC [23] 32-Pb Plasti ...
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Cypress CY7B9911V - page 13
CY7B991 1V 3.3V RoboClock+™ Document Number: 38-0740 8 Rev . *D Page 13 of 14 Package Diagram Figure 10. 32-Pin Plastic Lead ed Chip Carrier J65 51-85002-* B [+] Feedback ...
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Cypress CY7B9911V - page 14
Document Number: 38-07408 Rev . *D Revised June 20, 2007 Page 14 of 14 PSoC Designer™, Programmable System-on-Chip ™, an d PS oC Exp re ss™ are tra demarks a nd PSo C® is a registe red t rade mark of Cypress S emi con ductor Corp. All o ther tradema rks or r e gi stere d trademar ks refere nced herei n are prop erty of the respe ctive corp o ...
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