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Intel Entry Redundant Power 2U ERP2U - page 1
SSI ERP2U (Entry Redundant Power 2U) Power Supply Design Guide A Server System Infrastructure (SSI) Specification For 2U Rack Chassis Power Supplies Version 1.0 ...
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Intel Entry Redundant Power 2U ERP2U - page 2
SSI ERP2 U Power Supply Design Guide, V 1.0 - 2 - Disclaimer: THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANT Y OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. WITHOUT LIMITATION, THE PROMOTE ...
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Intel Entry Redundant Power 2U ERP2U - page 3
SSI ERP2 U Power Supply Design Guide, V 1.0 - 3 - Contents 1 Purpose .............................................................................................................................................. 5 2 Conceptual Overview .................................................................................................................. ...
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Intel Entry Redundant Power 2U ERP2U - page 4
SSI ERP2 U Power Supply Design Guide, V 1.0 - 4 - 8.2 PWOK (Power OK) .......................................................................................................................... 27 8.3 SMBus Communication .................................................................................................................... 28 8.3.1 Fiel ...
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Intel Entry Redundant Power 2U ERP2U - page 5
SSI ERP2 U Power Supply Design Guide, V 1.0 - 5 - 1 Purpose This 2U Rack Power Supply Design Guide defines a common redundant power sub - system used in 2U rack mount servers. The power sub - system is made up of a cage and hot swap redu ndant power modules. This Design Guide covers the mechanical and electrical requirements of this power sub - sys ...
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Intel Entry Redundant Power 2U ERP2U - page 6
SSI ERP2 U Power Supply Design Guide, V 1.0 - 6 - 3 Definitions/Terms/Acronyms Required The status given to i tems within this design guide, which are required to meet SSI guidelines and a large majority of system applications. Recommended The status given to items within this design guide which are not required to meet SSI guidelines, however, are ...
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Intel Entry Redundant Power 2U ERP2U - page 7
SSI ERP2 U Power Supply Design Guide, V 1.0 - 7 - 4 Mechanical Overview STATUS Required (Optional) Note: Some features are noted as optional in the enclosure drawing figure below. These features may be use in some chassis designs where only top access is allowed for the cage mounting. The ERP2U is a power sub - system made up of a cage and redundan ...
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Intel Entry Redundant Power 2U ERP2U - page 8
SSI ERP2 U Power Supply Design Guide, V 1.0 - 8 - 4.1 Optional Chassis Mounting Features STATUS Optional The optional top access mounti ng method fastens to the system chassis via three mounting holes; two on the exterior face and one with the tab on the interior face of the cage. There are also four rectangular cutouts on the bottom of the cage. T ...
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Intel Entry Redundant Power 2U ERP2U - page 9
SSI ERP2 U Power Supply Design Guide, V 1.0 - 9 - 4.2.1 Redundant Cooling STATUS Recommended It is recommended that the power supply cooling be redundant. This means the cooling device is located in the hot swap power supply modules or there are redundant devices located on the cage. 4.3 Temperature Requirements STATUS Recommended The power supply ...
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Intel Entry Redundant Power 2U ERP2U - page 10
SSI ERP2 U Power Supply Design Guide, V 1.0 - 10 - power supplies shall continue to operate with no interruptio n of performance. It is required that all redundant power supply modules be present to support redundant AC inlets. 5.3 AC Input Voltage Specification STATUS Required The power supply must operate within all specified limits over the foll ...
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Intel Entry Redundant Power 2U ERP2U - page 11
SSI ERP2 U Power Supply Design Guide, V 1.0 - 11 - 5.5 AC Line Dropout STATUS Required An AC line dr opout is defined to be when the AC input drops to 0 VAC at any phase of the AC line for any length of time. During an AC dropout of one cycle or less the power supply must meet dynamic voltage regulation requirements over the rated load. An AC line ...
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Intel Entry Redundant Power 2U ERP2U - page 12
SSI ERP2 U Power Supply Design Guide, V 1.0 - 12 - 5.8 AC Line Transient Specification STATUS Recommended AC line transient conditions shall be defined as “sag” and “surge” conditions. Sag conditions (also referred to as “brownout” conditions) will be de fined as the AC line voltage dropping below nominal voltage. Surge conditions will ...
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Intel Entry Redundant Power 2U ERP2U - page 13
SSI ERP2 U Power Supply Design Guide, V 1.0 - 13 - 6 DC Output Specification These are the output requirements for the power supply assembly including cage and module. 6.1 Output Connectors The pow er supply assembly shall have the following output connectors and wire harness configuration. 6.1.1 Required Baseboard power connector Connector housing ...
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Intel Entry Redundant Power 2U ERP2U - page 14
SSI ERP2 U Power Supply Design Guide, V 1.0 - 14 - 6.1.3 Required Peripheral Power Connectors Connec tor housing: Amp 1 - 480424 - 0 or equivalent Contact : Amp 61314 - 1 contact or equivalent Table 8 : Peripheral Power Connectors Pin Signal 18 AWG Color 1 +12V2 (or +12V3) Yellow 2 COM Black 3 COM Black 4 +5 VDC Red Note: The +12V power to peripher ...
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Intel Entry Redundant Power 2U ERP2U - page 15
SSI ERP2 U Power Supply Design Guide, V 1.0 - 15 - 6.1.5 Optional Server Signal Connector Connec tor housing: 5 - pin Molex 50 - 57 - 9405 or equivalent Contacts: Molex 16 - 02 - 0088 or equivalent (gold plated) Note s : It is recommended to use gold plated signal contacts on both the power supply connector and the baseboard header. If the optional ...
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Intel Entry Redundant Power 2U ERP2U - page 16
SSI ERP2 U Power Supply Design Guide, V 1.0 - 16 - 6.4 Output Power/Currents STATUS Recommended The following tables define the power and current ratings for two recommend power levels. Depending upon the system design, the power supply modules may have only three outputs (+12V, - 12V, and 5V SB) or the full five outputs (+3.3V, +5V, +12V, - 12V, a ...
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Intel Entry Redundant Power 2U ERP2U - page 17
SSI ERP2 U Power Supply Design Guide, V 1.0 - 17 - 6.4.1 Standby Outputs STATUS Required The 5 VSB output shall be present when an AC input greater than the power supply turn on voltage is applied. 6.5 Voltage Regulation STATUS Required The po wer assembly output voltages must stay within the following voltage limits when operating at steady state ...
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Intel Entry Redundant Power 2U ERP2U - page 18
SSI ERP2 U Power Supply Design Guide, V 1.0 - 18 - 6.6 Dynamic Loading STATUS Required The output voltages shall remain within the limits specified in Table 13 for the step loading and within the limits specified in Table 15 for the capacitive loading. The load transient repetition rat e shall be tested between 50 Hz and 5 kHz at duty cycles rangin ...
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Intel Entry Redundant Power 2U ERP2U - page 19
SSI ERP2 U Power Supply Design Guide, V 1.0 - 19 - Table 17 : Ripple and Noise +3.3 V +5 V +12 V - 12 V +5 VSB 50 mVp - p 50 mVp - p 120 mVp - p 120 mVp - p 50 mVp - p 6.9 Redundancy The power sub - system may have differen t levels of redundancy depending upon the availability requirements of the system. The Required, Recommended, and Optional ite ...
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Intel Entry Redundant Power 2U ERP2U - page 20
SSI ERP2 U Power Supply Design Guide, V 1.0 - 20 - DC connect at the same time as the module is inserte d into the cage. No damage to the connector contacts shall occur. The module may power on or come up into standby mode. Many variations of the above are possible. Supplies need to be compatible with these different variations depending upon the s ...
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Intel Entry Redundant Power 2U ERP2U - page 21
SSI ERP2 U Power Supply Design Guide, V 1.0 - 21 - 6.11 Timing Requirements STATUS Required These are the timing requirements for the power assembly operati on. The output voltages must rise from 10% to within regulation limits (T vout_rise ) within 5 to 200ms. The +3.3 V, +5 V and +12 V output voltages should start to rise at about the same time. ...
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Intel Entry Redundant Power 2U ERP2U - page 22
SSI ERP2 U Power Supply Design Guide, V 1.0 - 22 - Table 19 : Turn On/Off Timing Item Description MIN MAX UNITS T sb_on_delay Delay from AC being applied to 5 VSB being within regulation. 1500 ms T ac_on_delay Delay from AC being applied to all output voltages being within regulat ion. 2500 ms T vout_holdup Time all output voltages stay within regu ...
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Intel Entry Redundant Power 2U ERP2U - page 23
SSI ERP2 U Power Supply Design Guide, V 1.0 - 23 - Figure 3 : Turn On/Off Timing AC Input Vout PWOK 5VSB PSON# T sb_on_delay T AC_on_delay T pwok_on T vout_holdup T pwok_holdup T pson_on_delay T sb_on_delay T pwok_on T pwok_off T pwok_off T pson_pwo k T pwok_low T sb_vout AC turn on/off cycle PSON turn on/off cycle Tsb_holdup ...
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Intel Entry Redundant Power 2U ERP2U - page 24
SSI ERP2 U Power Supply Design Guide, V 1.0 - 24 - 7 Protection Circuits STATUS Required Protection circuits inside the power supply shall cause only the power supply’s ma in outputs to shutdown. If the power supply latches off due to a protection circuit tripping, an AC cycle OFF for 15 s and a PSON # cycle HIGH for 1 s must be able to reset the ...
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Intel Entry Redundant Power 2U ERP2U - page 25
SSI ERP2 U Power Supply Design Guide, V 1.0 - 25 - Table 21 : Over Current Protection Voltage Over Current Limit (Iout limit) +3.3 V 110% minimum; 150% maximum +5 V 110% minimum; 150% maximum +12V1,2,3 Peak current minimum; 20A maximum 7.3 Over Voltage Protection STATUS Required The power supply over voltage protection shall be locally sensed in th ...
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Intel Entry Redundant Power 2U ERP2U - page 26
SSI ERP2 U Power Supply Design Guide, V 1.0 - 26 - 8 Control and Indicator Functions The following sections define the input and output signals from the power sup ply. Signals that can be defined as low true use the following convention: signal # = low true 8.1 PSON# STATUS Required The PSON # signal is required to remotely turn on/off the power su ...
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Intel Entry Redundant Power 2U ERP2U - page 27
SSI ERP2 U Power Supply Design Guide, V 1.0 - 27 - 8.2 PWOK (Power OK) STATUS Required PWOK is a power OK signal and will be pulled HIGH by the power supply to indicate that all the outputs are within the regulation limits of the po wer supply. When any output voltage falls below regulation limits or when AC power has been removed for a time suffic ...
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Intel Entry Redundant Power 2U ERP2U - page 28
SSI ERP2 U Power Supply Design Guide, V 1.0 - 28 - 8.3 SMBus Communication STATUS Optional There may be SMBus communicatio n to the power assembly to monitor the cage and modules. This would require a serial EEPROM to store FRU data of each module and communicate the information onto the SMBus. There may also be a device in the cage to monitor the ...
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Intel Entry Redundant Power 2U ERP2U - page 29
SSI ERP2 U Power Supply Design Guide, V 1.0 - 29 - Asse t Tag {Not used, code is zero length byte} FRU File ID {Not required} PAD Bytes {Added as necessary to allow for 8 - byte offset to next area} 8.3.3.2 MultiRecord Area As defined by the IPMI FRU document. The following record types shall be used on this power s upply: • Power Supply Informat ...
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Intel Entry Redundant Power 2U ERP2U - page 30
SSI ERP2 U Power Supply Design Guide, V 1.0 - 30 - 8.4 LED Indicators STATUS Required There shall be a single bi - color LED OR two LEDs, one AMBER and one GREEN, on each hot swap power module to indicate power supply status. When AC is applied to the power supply and standby voltages are available the GREEN LED shall BLINK. The GREEN LED shall tur ...
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Intel Entry Redundant Power 2U ERP2U - page 31
SSI ERP2 U Power Supply Design Guide, V 1.0 - 31 - 9 MTBF STATUS Recommended The power module shall have a minimum MTBF at continuous operation of 1) 50,000 hours at 100% load and 45 ° C, as calculated by Bellcore RPP, or 2) 100,000 hours demonstrated at 100% load and 50 ° C. The power cage shall have a minimum MTBF at continuous operation of 1) ...
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